URL https://opencores.org/ocsvn/mcs-4/mcs-4/trunk

Subversion Repositories mcs-4

[/] [mcs-4/] [trunk/] [rtl/] [verilog/] - Rev 6

Rev	Log message	Author	Age	Path
6	Massive update of all MCS-4 components This commit updates all the previous i4004 CPU modules to address various bugs that were found during testing. At this point, all CPU functions appear to operate correctly. No FPGA-specific features are required by the i4004 CPU implementation. This commit also provides implementations of the 4001 ROM, 4002 RAM, and 4003 Shift Register chips, thus allowing a functional MCS-4 system to be implemented. Some of these modules are dependent on features found in the Xilinx Spartan FPGA, such as Block RAM and dual-port Distributed RAM, though alternate implementations are possible for other FPGAs. These modules have been used (along with keyboard and printer emulation modules not provided here) to implement a complete Busicom 141-PF calculator clone using a Xilinx Spartan 6 FPGA and a custom PCB. All functions of the Busicom 141-PF calculator appear to function normally.	rrpollack	1081d 22h	/mcs-4/trunk/rtl/verilog/
5	Restructure the project directory hierarchy This commit restructures the directory hierarchy to extract modules that will be common to more than one MCS-4 chip, and move the modules specific to the i4004 CPU to their own subdirectory.	rrpollack	1082d 02h	/mcs-4/trunk/rtl/verilog/
4	Miscellaneous bugfixes to the Verilog implementation of the i4004 CPU	rrpollack	1656d 22h	/mcs-4/trunk/rtl/verilog/
2	Initial import of core 4004 CPU source	rrpollack	4388d 15h	/mcs-4/trunk/rtl/verilog/