URL https://opencores.org/ocsvn/mdct/mdct/trunk

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[/] [mdct/] [tags/] [MDCT_REL_B1_6/] [source/] - Rev 24

Rev	Log message	Author	Age	Path
24	New directory structure.	root	5626d 16h	/mdct/tags/MDCT_REL_B1_6/source/
19	This commit was manufactured by cvs2svn to create tag 'MDCT_REL_B1_6'.		6653d 19h	/mdct/tags/MDCT_REL_B1_6/source/
18	Minor fixes. This release is FPGA proven.	mikel262	6653d 19h	/mdct/tags/MDCT_REL_B1_6/source/
16	Documentation update, minor fixes	mikel262	6675d 15h	/mdct/tags/MDCT_REL_B1_6/source/
15	Redesigned. Fully pipelined, always ready for data design	mikel262	6675d 17h	/mdct/tags/MDCT_REL_B1_6/source/
13	performance improved by 8%, latency reduced to 94 cycles	mikel262	6679d 16h	/mdct/tags/MDCT_REL_B1_6/source/
11	changed ROM memory model to synchronous	mikel262	6680d 15h	/mdct/tags/MDCT_REL_B1_6/source/
10	+ moved memory allocation request to where it should be + reduced latency to 104 cycles	mikel262	6681d 17h	/mdct/tags/MDCT_REL_B1_6/source/
7	documentation update. minor area optimization.	mikel262	6684d 14h	/mdct/tags/MDCT_REL_B1_6/source/
6	minor updates	mikel262	6685d 15h	/mdct/tags/MDCT_REL_B1_6/source/
4	area optimization - 100 slices less	mikel262	6685d 16h	/mdct/tags/MDCT_REL_B1_6/source/
2	Initial import (Beta Release)	mikel262	6686d 04h	/mdct/tags/MDCT_REL_B1_6/source/