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Subversion Repositories minimips_superscalar

[/] [minimips_superscalar/] - Rev 37

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Rev Log message Author Age Path
37 pc update. mcafruni 1525d 01h /minimips_superscalar/
36 update pc mcafruni 1525d 01h /minimips_superscalar/
35 New delay_gate.vhd mcafruni 1527d 20h /minimips_superscalar/
34 Delete delay_gate to upload a new one. mcafruni 1527d 20h /minimips_superscalar/
33 New syscop.vhd mcafruni 1527d 20h /minimips_superscalar/
32 Delete syscop to upload a new one. mcafruni 1527d 20h /minimips_superscalar/
31 New top module. mcafruni 1527d 20h /minimips_superscalar/
30 Delete top module to upload a new one. mcafruni 1527d 20h /minimips_superscalar/
29 New banc register file. mcafruni 1527d 20h /minimips_superscalar/
28 Delete banc.vhd to upload a new one. mcafruni 1527d 20h /minimips_superscalar/
27 New bench on P1 tag. mcafruni 1527d 21h /minimips_superscalar/
26 Delete bench to upload a new one. mcafruni 1527d 21h /minimips_superscalar/
25 New bench mcafruni 1527d 21h /minimips_superscalar/
24 Delete bench to upload a new one. mcafruni 1527d 21h /minimips_superscalar/
23 Moving the benchmarks folder into the trunk folder. mcafruni 1533d 15h /minimips_superscalar/
22 Wrong code. (fi0.bin) But revealed a bug that needs attention. mcafruni 1533d 15h /minimips_superscalar/
21 Correcting codes that work in behavioral simulation but cause problems with implementation. There must be more to be corrected yet. In analysis ... mcafruni 1533d 15h /minimips_superscalar/
20 I've uncommented wait statement so that the benchmark to be loaded into the simulation. mcafruni 1568d 03h /minimips_superscalar/
19 mcafruni 1901d 19h /minimips_superscalar/
18 clock_gate.vhd: removed.
minimips.vhd: Clock2 input is wrongly connected to the clock signal (Do not ask me how that happened. I'm sorry.). The right thing is to be connected to the clock2 signal. Adjusted.		 mcafruni 1901d 20h /minimips_superscalar/

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