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[/] [minimips_superscalar/] [tags/] - Rev 21

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21 Correcting codes that work in behavioral simulation but cause problems with implementation. There must be more to be corrected yet. In analysis ... mcafruni 1587d 17h /minimips_superscalar/tags/
19 mcafruni 1955d 21h /minimips_superscalar/tags/
18 clock_gate.vhd: removed.
minimips.vhd: Clock2 input is wrongly connected to the clock signal (Do not ask me how that happened. I'm sorry.). The right thing is to be connected to the clock2 signal. Adjusted.		 mcafruni 1955d 21h /minimips_superscalar/tags/
16 FIR filter with 36 coefficients. (binary to run) mcafruni 1989d 07h /minimips_superscalar/tags/
15 FIR filter with 36 coefficients. mcafruni 1989d 07h /minimips_superscalar/tags/
14 Buble Sort algorithm. Four totally disorderly numbers are sorted in ascending order. Worst performance algorithm. mcafruni 1993d 01h /minimips_superscalar/tags/
13 Buble Sort algorithm. Four totally disorderly numbers are sorted in ascending order. Worst performance algorithm. mcafruni 1993d 01h /minimips_superscalar/tags/
12 Static Fast Fourier Transform COOLEY TUKEY algorithm to 8 samples. The signal must have zeros betwen non null samples to prevent multiplication by real and complex numbers, since the core don't have floating point. mcafruni 1993d 02h /minimips_superscalar/tags/
11 Static Fast Fourier Transform COOLEY TUKEY algorithm to 8 samples. The signal must have zeros betwen non null samples to prevent multiplication by real and complex numbers, since the core don't have floating point. mcafruni 1993d 02h /minimips_superscalar/tags/
10 Matrix/Vector multiplication by constant. (binary) mcafruni 2003d 00h /minimips_superscalar/tags/
9 Matrix/Vector multiplication by constant. mcafruni 2003d 00h /minimips_superscalar/tags/
8 mcafruni 2033d 23h /minimips_superscalar/tags/
5 6x6 Matrix multiplication (ingenuous algorithm)
msx.bin: uses 16-bit operands multiplication instruction (mult2 rd, rs, rt).
m6x.bin: uses 32-bit operands original multiplication instruction (mult rs, rt) and the move instruction (mflo rd) after.		 mcafruni 2046d 19h /minimips_superscalar/tags/
4 It needs to be tested on more useful and real benchmarks to reveal possible instruction sequences not supported by the architecture. Suggestions are welcome. mcafruni 2046d 20h /minimips_superscalar/tags/
1 The project and the structure was created root 2047d 06h /minimips_superscalar/tags/

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