URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

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[/] [minsoc/] - Rev 132

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Rev	Log message	Author	Age	Path
132	ModelSim simulation, running top_module minsoc_bench_clock now, instead of minsoc_bench.	rfajardo	4751d 02h	/minsoc/
131	Renaming testbench modules. Adding to ifdefs without which the testbench generation can fail.	rfajardo	4751d 02h	/minsoc/
130	minsoc_bench.v: task test_eth has to be phased out together with the ETHERNET definition. If there is no ETHERNET, test_eth cannot be defined.	rfajardo	4751d 05h	/minsoc/
129	Removing bugs introduced when splitting clocks and reset. 1) NEGATIVE_RESET or POSITIVE_RESET were missing as definition on minsoc_bench_clock.v (include minsoc_defines.v). 2) wait for reset on minsoc_bench.v to assert design_ready	rfajardo	4751d 16h	/minsoc/
128	Outsourcing clocks and reset generations from minsoc_bench.v to minsoc_bench_clock.v.	rfajardo	4751d 17h	/minsoc/
127	Removing redundant simulation output.	rfajardo	4751d 23h	/minsoc/
126	Updating information about simulation time for Ethernet test.	rfajardo	4751d 23h	/minsoc/
125	Adjusting testbench messages. Creating tasks for firmware tests.	rfajardo	4751d 23h	/minsoc/
124	Removing Verilog delays from minsoc_bench.v. minsoc_bench_defines.v defines now if uart or ethernet have to be tested. If yes, it checks the behavior of the enclosed firmwares. If not, simulation simply runs forever.	rfajardo	4752d 01h	/minsoc/
123	Renaming reg final to firmware_size. Final is a keyword for Verilator.	rfajardo	4752d 06h	/minsoc/
122	Renaming minsoc-configure.sh to minsoc-setup.sh.	rfajardo	4757d 19h	/minsoc/
121	Asserting svn:executable properties of modelsim/*.bat scripts. Including corrected patch for advanced debug system watchpoints under utils/setup. Configure script updated to use this instead of advanced debug system patches. This will remain so until the patch is corrected. The previous line still has the correct command.	rfajardo	4757d 21h	/minsoc/
120	ethmac.prj: a file was missing	rfajardo	4758d 00h	/minsoc/
119	Tricking Subversion to accept bat files that are now executable.	rfajardo	4758d 00h	/minsoc/
118	Configure scripts for Xilinx devices updated. All of them require to update or1200_defines.v. The non-standard part uses now the variable $BOARD to print that this board require non-standard update of files.	rfajardo	4758d 00h	/minsoc/
117	spartan3e_starter_kit designs require DUALPORT from or1200_defines.v to be active instead of GENERIC.	rfajardo	4758d 01h	/minsoc/
116	Configure scripts were trying to copy/patch projects files before creating them. Ordering is correct now.	rfajardo	4758d 02h	/minsoc/
115	configure.sh script dir aware. minsoc-install.sh logging to script dir.	rfajardo	4758d 02h	/minsoc/
114	Installation and Configuration scripts can be run out of any directory. They assume they are going to process the files and directories found in the directory they are run from.	rfajardo	4758d 02h	/minsoc/
113	minsoc-install.sh & minsoc-configure.sh: -aware of location of configure.sh script configure.sh: -does not block on patch error spartan3e_starter_kit & spartan3e_starter_kit_eth: -or1200_defines.v updated prj: -src/blackboxes/or1200_top.v adjusted to or1200_rel1 -Makefile had a typo regarding altera vhdl files	rfajardo	4758d 03h	/minsoc/

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[/] [minsoc/] - Rev 132

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