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5 vpi path corrected in how to. rfajardo 5533d 10h /minsoc/branches/rc-1.0/
4 minsoc_bench.v had a big memory declaration to load the firmware, which was not necessary.

jp-io-vpi.vpi has to be compiled for different systems so removed from the project. Documentation now explains how to do it.

Documentation now includes:
-vpi module compilation
-gdb patch for adv_jtag_bridge
-ideas for future work on minsoc (To Do v.2)
rfajardo 5533d 10h /minsoc/branches/rc-1.0/
3 Changed documentation
-advice to compile sw/utils before compiling target software
rfajardo 5537d 08h /minsoc/branches/rc-1.0/
2 First commit of project. Beta status:
-testbench: working
-firmware: working
-RTL: Working for: Xilinx Spartan-3A DSP Development Kit
rfajardo 5537d 09h /minsoc/branches/rc-1.0/
1 The project was created and the structure was created root 5537d 10h /minsoc/branches/rc-1.0/

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