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[/] [minsoc/] [trunk/] [sw/] - Rev 63

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Rev	Log message	Author	Age	Path
61	Removing supposely defined external function, which don't exist anymore.	rfajardo	4937d 11h	/minsoc/trunk/sw/
55	Adjusting Makefiles to compile correctly with new firmware updates. 1) except.o not included into libsupport.a. 2) libsupport.a linked to except.o, now in correct order: ld libsupport.a except.o -o executable (not the other way around) 3) int.c was not being compiled because of a #ifdef which is not set anywhere	rfajardo	4946d 07h	/minsoc/trunk/sw/
54	Moving spr_defs.h to or1200.h	ConX.	4946d 08h	/minsoc/trunk/sw/
53	Indentation, deleting redundant files and adding externals	ConX.	4946d 10h	/minsoc/trunk/sw/
51	sw/support/uart.c: Changing the order of writes to the Divisor Latch of UART. (Thanks Ramkumar)	rfajardo	4961d 12h	/minsoc/trunk/sw/
50	Removing unused firmware files, respective to or1ksim actually. Removing the inclusion of the removed file mc.h in reset.S, probably required by or1ksim at some point. Reworked except.S to use a macro instead of repeating the same procedure 16 times or so. Explanation added to the macro as a leading comment.	rfajardo	4973d 09h	/minsoc/trunk/sw/
47	Firmware updated to work with gcc-4.5. It is actually working just fine and gcc-4.5 assembly code seems a lot cleaner. I noticed that by increasing the free stack space for the interrupt handler by 130 made the resulting firmware not work. I assume it is because 130 is not aligned 130%4 = 2 and the stack simply does not work then. Instead I'm freeing the previous 116 plus 128 (for 32 registers as mentioned by Jeremy) and it works.	rfajardo	4976d 06h	/minsoc/trunk/sw/
39	FAQ: -Adv_jtag_bridge self test fails? -included now SoC flow mistakes -forgetting to upload the bitfile -leaving clock unconnected -older information is now under "Known Issues" right below of SoC flow mistakes Software: -eth: included eth.h is from drivers and not from this directory. eth.h from this directory is old and has been removed. -uart: included uart.h is from drivers and not from this directory. uart.h from this directory is old and has been removed.	rfajardo	5052d 22h	/minsoc/trunk/sw/
38	Small update to HOWTO: advices now to also include the ucf (pinout) file, for forgetful people :-). FAQ: Added another option (hint) as a solution for people with on-board Xilinx USB cables, which do not reset. uart.c: now uses the IRQ line definition instead of the line number directly.	rfajardo	5087d 21h	/minsoc/trunk/sw/
37	README.txt added, describing the installation and set-up processes. Also describing to use the FAQ or forum when you have problems and finally to read minsoc.pdf (the documentation) to understand the system after everything works, to know what to do next. Clean-up of sw/utils, removing unused sources and files. Update of sw/drivers/eth.c, direct casting to avoid compile warnings. FAQ extended and with more links to the threads giving the solutions. Synthesis examples inform that the firmware tweak for Spartan3E Starter Kit using Ethernet only works for system version up to 35. minsoc.pdf and webpage now uses FPGA generic and specific codes instead of FPGA independent and dependent codes, because it suits it better.	rfajardo	5118d 08h	/minsoc/trunk/sw/
36	utils: -adding a 32 to 8 bit Wishbone bridge to connect 8 bit modules to the MinSoC interconnect. -adding a Linux driver for parallel cables for the adv_jtag_bridge. It circumvents the necessity of privilege to run adv_jtag_bridge with cables xpc3 and xess. sw/support: support library has been made completely standalone. That means, it is now independent from uClib and/or newlib. Thanks to Wojciech A. Koszek for his contribution on this. sw/drivers: a driver library has been included, which supply drivers for the OpenRISC timer; and for UART, Ethernet, I2C, and CAN modules from OpenCores. sw/uart and sw/eth: they don't provide code to control the UART and Ethernet controllers anymore. They use the drivers library instead. Documentation: -FAQ extended: -table of contents -explanation of how to use the 32 to 8 bit Wishbone bridge -how to make adv_jtag_bridge work without privilege requirement for xess or xpc3 -explanation of locking problem of xpc_usb cable -explanation of what to do if the cable is built on-board -INSTALL: -patching of gdb only required if version is 6.8, explanation on FAQ now. -HOWTO: -instruct to compile drivers library -remove line numbers information on what to edit, better leave it to be found only by the informed context. -adv_jtag_bridge execution now without 'sudo'. Note included that 'sudo' is required for Linux and xess or xpc3. Reference to FAQ to avoid this requirement.	rfajardo	5119d 04h	/minsoc/trunk/sw/
11	External interrupt processing was being run multiple times because: -external level interrupts have to be cleared -internal interrupt status register has to be cleared Since internal interrupt status register was being cleared before external level interrupts clearance, these internal interrupt status was being overwritten inbetween. Solution: -move status register reset to end of interrupt handler instead of beginning. Testbench signal uart_srx initialized now.	rfajardo	5490d 06h	/minsoc/trunk/sw/
2	First commit of project. Beta status: -testbench: working -firmware: working -RTL: Working for: Xilinx Spartan-3A DSP Development Kit	rfajardo	5525d 09h	/minsoc/trunk/sw/

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