OpenCores
URL https://opencores.org/ocsvn/mlite/mlite/trunk

Subversion Repositories mlite

[/] [mlite/] [trunk/] - Rev 25

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
25 opcodes target rhoads 8221d 02h /mlite/trunk/
24 Disable interrupts upon reset. rhoads 8221d 02h /mlite/trunk/
23 Fixed div -x/y. rhoads 8221d 02h /mlite/trunk/
22 Switched to gcc compiler. rhoads 8221d 02h /mlite/trunk/
21 Moved startup to boot.asm rhoads 8221d 02h /mlite/trunk/
20 Startup code. rhoads 8221d 02h /mlite/trunk/
19 Changed simili run to 40us. rhoads 8223d 02h /mlite/trunk/
18 Fixed "divu $3,$4". "Div $3,$4" still has bug if $3*$4<0. rhoads 8223d 02h /mlite/trunk/
17 Fixed "blez $0,target". Made LWL=LW and SWL=SW. Changed tabs to spaces. rhoads 8223d 02h /mlite/trunk/
16 Fixed binary to HEX when the number of digits isn't a multiple of 4. rhoads 8223d 02h /mlite/trunk/
15 Test all MIPS I opcodes. rhoads 8223d 02h /mlite/trunk/
14 Fixed big-endian mode bugs rhoads 8227d 02h /mlite/trunk/
13 Removed reg_bank configuration control rhoads 8227d 02h /mlite/trunk/
12 Better support for dual-port memories, removed old method rhoads 8227d 02h /mlite/trunk/
11 Added comment for DEBUG mode rhoads 8227d 02h /mlite/trunk/
10 Add pause_in to process dependency, fixes "lw $4,0($4)" rhoads 8227d 02h /mlite/trunk/
9 Support for generic_tpram dual-port RAM rhoads 8232d 05h /mlite/trunk/
8 Preparing to use dual-port memory for registers. rhoads 8233d 03h /mlite/trunk/
7 Made writes 4 cycles, improved mem_ctrl.vhd rhoads 8238d 09h /mlite/trunk/
6 JAL now correctly sets r31 to instruction AFTER branch delay slot. Fixed interrupts. rhoads 8242d 08h /mlite/trunk/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.