URL https://opencores.org/ocsvn/mlite/mlite/trunk

Subversion Repositories mlite

[/] [mlite/] [trunk/] [vhdl/] - Rev 101

Rev	Log message	Author	Age	Path
101	Correctly freeze the pipeline when mem_pause = '1'	rhoads	7921d 10h	/mlite/trunk/vhdl/
99	correct upper 32-bits for mult(-1,-1)	rhoads	8063d 10h	/mlite/trunk/vhdl/
98	Fix size of GENERIC ram.	rhoads	8068d 08h	/mlite/trunk/vhdl/
97	added documentation	rhoads	8132d 14h	/mlite/trunk/vhdl/
96	Simplify take_branch	rhoads	8166d 16h	/mlite/trunk/vhdl/
95	register mem_write and mem_byte_sel for speed calculations	rhoads	8166d 16h	/mlite/trunk/vhdl/
93	make run now runs for 500 us	rhoads	8168d 09h	/mlite/trunk/vhdl/
92	Updated	rhoads	8168d 09h	/mlite/trunk/vhdl/
91	Removed unused alu_function_type entries	rhoads	8168d 09h	/mlite/trunk/vhdl/
90	Now multiplies two bits at a time	rhoads	8168d 09h	/mlite/trunk/vhdl/
89	Use address_reg instead of address_data to break timing slow down	rhoads	8168d 09h	/mlite/trunk/vhdl/
88	Cleanup spaces	rhoads	8168d 10h	/mlite/trunk/vhdl/
87	Seperated left and right shift variables	rhoads	8168d 10h	/mlite/trunk/vhdl/
86	Updated comment	rhoads	8168d 10h	/mlite/trunk/vhdl/
85	Use ADDRESS_WIDTH when decoding mem_sel	rhoads	8168d 10h	/mlite/trunk/vhdl/
84	Fixed comment	rhoads	8168d 10h	/mlite/trunk/vhdl/
83	Updated comments, accurate_timing on by default	rhoads	8168d 10h	/mlite/trunk/vhdl/
82	Added to process list	rhoads	8168d 10h	/mlite/trunk/vhdl/
81	Removed unused case statements	rhoads	8168d 10h	/mlite/trunk/vhdl/
79	pipeline	rhoads	8176d 11h	/mlite/trunk/vhdl/