Rev |
Log message |
Author |
Age |
Path |
39 |
changed files to remove warnings from synthesis
last cell logic is simplified because of redundant logic |
JonasDC |
4269d 11h |
/mod_sim_exp/tags/Release_1.3/ |
38 |
deprecated design files because of new pipeline structure, will be removed shortly |
JonasDC |
4269d 17h |
/mod_sim_exp/tags/Release_1.3/ |
37 |
changed names of some generics of the multiplier.
moved the parameters for the core to the package of the core
testbench now uses this parameters to adapt to different bit widths
and new systolic pipeline now supports split or single pipeline |
JonasDC |
4273d 14h |
/mod_sim_exp/tags/Release_1.3/ |
36 |
found bug in new pipeline structure, now working properly. (tested in sim)
mod_sim_exp_core uses new flexible pipeline as default. |
JonasDC |
4274d 10h |
/mod_sim_exp/tags/Release_1.3/ |
35 |
new test values, 1st exponentiation gives error on result with new pipeline
commit for test purposes |
JonasDC |
4274d 13h |
/mod_sim_exp/tags/Release_1.3/ |
34 |
operand memory now supports custom operand widths, the internal memory stays the fixed 1536 bit, but the bus width is now adjustable to any size below. |
JonasDC |
4274d 14h |
/mod_sim_exp/tags/Release_1.3/ |
33 |
default pipeline changed to old version, there seems to be an occasional error with new version. |
JonasDC |
4274d 16h |
/mod_sim_exp/tags/Release_1.3/ |
32 |
new systolic pipeline structure now has split pipeline support, tested and verified in simulation. the core now uses this pipeline by default. |
JonasDC |
4274d 17h |
/mod_sim_exp/tags/Release_1.3/ |
31 |
put first cell logic of the pipeline in a separate design unit, tested and working |
JonasDC |
4274d 23h |
/mod_sim_exp/tags/Release_1.3/ |
30 |
put last cell logic of the pipeline in a separate design unit, tested and working |
JonasDC |
4274d 23h |
/mod_sim_exp/tags/Release_1.3/ |
29 |
added software for generation of test input for the tesbenches |
JonasDC |
4275d 12h |
/mod_sim_exp/tags/Release_1.3/ |
28 |
updated makefile for new pipeline sources |
JonasDC |
4275d 13h |
/mod_sim_exp/tags/Release_1.3/ |
27 |
test input values for multiplier_tb |
JonasDC |
4275d 13h |
/mod_sim_exp/tags/Release_1.3/ |
26 |
testbench for only the montgommery multiplier |
JonasDC |
4275d 13h |
/mod_sim_exp/tags/Release_1.3/ |
25 |
first version of new pipeline design. allows for more flexibility in nr of stages.
does not support split pipeline support yet. currently only works for single pipeline |
JonasDC |
4275d 13h |
/mod_sim_exp/tags/Release_1.3/ |
24 |
changed names of top-level module to mod_sim_exp_core |
JonasDC |
4278d 22h |
/mod_sim_exp/tags/Release_1.3/ |
23 |
added descriptive comments |
JonasDC |
4278d 23h |
/mod_sim_exp/tags/Release_1.3/ |
22 |
updated the systolic pipeline with descriptive signal names and comments |
JonasDC |
4281d 17h |
/mod_sim_exp/tags/Release_1.3/ |
21 |
changed x_i signal to xi |
JonasDC |
4283d 00h |
/mod_sim_exp/tags/Release_1.3/ |
20 |
added comments, changed signal name of x_reg_i to x_reg.
File is now according to OC design rules |
JonasDC |
4283d 01h |
/mod_sim_exp/tags/Release_1.3/ |