URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [tags/] [Release_1.4/] [sim/] [out/] - Rev 96

Rev	Log message	Author	Age	Path
93	Tag for Version 1.4 of The Modular Simulataneous Exponentiation Core. This version adds support for the AXI4-Lite bus interface.	JonasDC	3989d 20h	/mod_sim_exp/tags/Release_1.4/sim/out/
70	updated testbench for use with new core parameters updated makefile, added new sources	JonasDC	4106d 17h	/mod_sim_exp/tags/Release_1.4/sim/out/
11	simulation output folder	JonasDC	4240d 16h	/mod_sim_exp/tags/Release_1.4/sim/out/
5	not needed on svn, is generated by testbench	JonasDC	4240d 22h	/mod_sim_exp/tags/Release_1.4/sim/out/
3	updated vhdl sources with new header according to OC design rules and formated code added makefile and simulation input file for testbench simulation	JonasDC	4241d 13h	/mod_sim_exp/tags/Release_1.4/sim/out/