OpenCores
URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [trunk/] - Rev 30

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
30 put last cell logic of the pipeline in a separate design unit, tested and working JonasDC 4394d 02h /mod_sim_exp/trunk/
29 added software for generation of test input for the tesbenches JonasDC 4394d 15h /mod_sim_exp/trunk/
28 updated makefile for new pipeline sources JonasDC 4394d 16h /mod_sim_exp/trunk/
27 test input values for multiplier_tb JonasDC 4394d 16h /mod_sim_exp/trunk/
26 testbench for only the montgommery multiplier JonasDC 4394d 16h /mod_sim_exp/trunk/
25 first version of new pipeline design. allows for more flexibility in nr of stages.
does not support split pipeline support yet. currently only works for single pipeline		 JonasDC 4394d 16h /mod_sim_exp/trunk/
24 changed names of top-level module to mod_sim_exp_core JonasDC 4398d 01h /mod_sim_exp/trunk/
23 added descriptive comments JonasDC 4398d 02h /mod_sim_exp/trunk/
22 updated the systolic pipeline with descriptive signal names and comments JonasDC 4400d 19h /mod_sim_exp/trunk/
21 changed x_i signal to xi JonasDC 4402d 03h /mod_sim_exp/trunk/
20 added comments, changed signal name of x_reg_i to x_reg.
File is now according to OC design rules		 JonasDC 4402d 03h /mod_sim_exp/trunk/
19 updated files with descriptive comments
changed signal names and removed redundant signals in stepping_logic		 JonasDC 4406d 22h /mod_sim_exp/trunk/
18 updated stages with comments and renamed some signals for consistency JonasDC 4407d 22h /mod_sim_exp/trunk/
17 updated files with descriptive comments and removed unnecessary signals in standard stage. Files are now according to OC design rules JonasDC 4408d 03h /mod_sim_exp/trunk/
16 package with modified generic parameter for register_n JonasDC 4408d 16h /mod_sim_exp/trunk/
15 changed generic for register width from n to width for consistency JonasDC 4408d 16h /mod_sim_exp/trunk/
14 changed comments, file is now according to OC design rules JonasDC 4408d 16h /mod_sim_exp/trunk/
13 added some descriptive comments and added check for incorrect value's of width and block_width.
File is now according to OC design rules		 JonasDC 4408d 17h /mod_sim_exp/trunk/
12 updated comments, file is now completely according to design rules JonasDC 4408d 17h /mod_sim_exp/trunk/
11 simulation output folder JonasDC 4408d 19h /mod_sim_exp/trunk/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.