OpenCores
URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] - Rev 8

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
8 added missing FENCE instruction; added optional Zifencei CPU extension zero_gravity 1581d 05h /neorv32/trunk/
7 removed "mtinst" CSR since it is not ratified yet by the RISC-V specs zero_gravity 1581d 07h /neorv32/trunk/
6 new processor version: 1.0.0.0 -> increased performance; debugged errors; processor now passes risc-v compliance tests; see changelog for more information zero_gravity 1582d 03h /neorv32/trunk/
5 fixed bootloader bug introduced with last commit zero_gravity 1590d 13h /neorv32/trunk/
4 see NEORV32.pdf for changelog zero_gravity 1590d 13h /neorv32/trunk/
3 general updates, see changelog in NEORV32.pdf for more information zero_gravity 1592d 06h /neorv32/trunk/
2 - initial commit zero_gravity 1593d 08h /neorv32/trunk/
1 The project and the structure was created root 1594d 04h /neorv32/trunk/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.