OpenCores
URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [sim/] - Rev 32

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
31 updated to version 1.4.4.8
see (new!) CHANGELOG.md for more information
zero_gravity 1355d 03h /neorv32/trunk/sim/
30 updated to version 1.4.4.5
see changelog in docs/NEORV32.pdf
zero_gravity 1358d 03h /neorv32/trunk/sim/
28 updated to version v1.4.4.0
see changelog in docs/NEORV32.pdf for more information
zero_gravity 1361d 03h /neorv32/trunk/sim/
27 updated to version 1.4.3.9
see changelog in docs/NEORV32.pdf
zero_gravity 1364d 05h /neorv32/trunk/sim/
25 updated to version 1.4.3.2 zero_gravity 1370d 08h /neorv32/trunk/sim/
23 updated to version 1.4.3.0
see changelog in docs/NEORV32.pdf for more information
zero_gravity 1380d 03h /neorv32/trunk/sim/
22 updated to version 1.4.0.0
see changelog in docs/NEORV32.pdf for more information
zero_gravity 1398d 07h /neorv32/trunk/sim/
20 updated to HW version 1.3.7.0
see docs/NEORV32.pdf for more information
zero_gravity 1413d 04h /neorv32/trunk/sim/
19 updated to version 1.3.6.5
see docs/NEORV32.pdf for more information
zero_gravity 1421d 03h /neorv32/trunk/sim/
18 updated to version 1.3.6.0
see NEORV32.pdf for more information
zero_gravity 1424d 02h /neorv32/trunk/sim/
16 minor edits; buck fixes in PMP
see changelog in NEORV32.pdf for more information
zero_gravity 1428d 05h /neorv32/trunk/sim/
15 updated to HW version 1.3.5.0
see changelog in NEORV32.pdf for more information
zero_gravity 1429d 04h /neorv32/trunk/sim/
14 update to HW version 1.3.0.0
see changelog in NEORV32.pdf for more information
zero_gravity 1433d 10h /neorv32/trunk/sim/
13 updates, optimizations and bug fixes; see changelog in NEORV32.pdf zero_gravity 1437d 02h /neorv32/trunk/sim/
12 Processor version 1.2.0.5 - see changelog in NEORV32.pdf zero_gravity 1438d 08h /neorv32/trunk/sim/
11 new hardware version, see changelog in NEORV32.pdf zero_gravity 1448d 04h /neorv32/trunk/sim/
8 added missing FENCE instruction; added optional Zifencei CPU extension zero_gravity 1452d 02h /neorv32/trunk/sim/
7 removed "mtinst" CSR since it is not ratified yet by the RISC-V specs zero_gravity 1452d 04h /neorv32/trunk/sim/
6 new processor version: 1.0.0.0 -> increased performance; debugged errors; processor now passes risc-v compliance tests; see changelog for more information zero_gravity 1453d 00h /neorv32/trunk/sim/
4 see NEORV32.pdf for changelog zero_gravity 1461d 10h /neorv32/trunk/sim/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.