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[/] [neorv32/] [trunk/] [sw/] [example/] - Rev 17

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Rev Log message Author Age Path
17 minor edits and clean-ups zero_gravity 1429d 19h /neorv32/trunk/sw/example/
16 minor edits; buck fixes in PMP
see changelog in NEORV32.pdf for more information
zero_gravity 1429d 21h /neorv32/trunk/sw/example/
15 updated to HW version 1.3.5.0
see changelog in NEORV32.pdf for more information
zero_gravity 1430d 21h /neorv32/trunk/sw/example/
14 update to HW version 1.3.0.0
see changelog in NEORV32.pdf for more information
zero_gravity 1435d 02h /neorv32/trunk/sw/example/
13 updates, optimizations and bug fixes; see changelog in NEORV32.pdf zero_gravity 1438d 18h /neorv32/trunk/sw/example/
12 Processor version 1.2.0.5 - see changelog in NEORV32.pdf zero_gravity 1440d 01h /neorv32/trunk/sw/example/
11 new hardware version, see changelog in NEORV32.pdf zero_gravity 1449d 20h /neorv32/trunk/sw/example/
8 added missing FENCE instruction; added optional Zifencei CPU extension zero_gravity 1453d 18h /neorv32/trunk/sw/example/
7 removed "mtinst" CSR since it is not ratified yet by the RISC-V specs zero_gravity 1453d 21h /neorv32/trunk/sw/example/
6 new processor version: 1.0.0.0 -> increased performance; debugged errors; processor now passes risc-v compliance tests; see changelog for more information zero_gravity 1454d 16h /neorv32/trunk/sw/example/
3 general updates, see changelog in NEORV32.pdf for more information zero_gravity 1464d 20h /neorv32/trunk/sw/example/
2 - initial commit zero_gravity 1465d 21h /neorv32/trunk/sw/example/

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