URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [sw/] [lib/] [include/] - Rev 12

Rev	Log message	Author	Age	Path
12	Processor version 1.2.0.5 - see changelog in NEORV32.pdf	zero_gravity	1567d 15h	/neorv32/trunk/sw/lib/include/
11	new hardware version, see changelog in NEORV32.pdf	zero_gravity	1577d 10h	/neorv32/trunk/sw/lib/include/
10	minor updates and front page modifications	zero_gravity	1580d 08h	/neorv32/trunk/sw/lib/include/
9	minor edits and updates	zero_gravity	1580d 10h	/neorv32/trunk/sw/lib/include/
8	added missing FENCE instruction; added optional Zifencei CPU extension	zero_gravity	1581d 08h	/neorv32/trunk/sw/lib/include/
7	removed "mtinst" CSR since it is not ratified yet by the RISC-V specs	zero_gravity	1581d 11h	/neorv32/trunk/sw/lib/include/
6	new processor version: 1.0.0.0 -> increased performance; debugged errors; processor now passes risc-v compliance tests; see changelog for more information	zero_gravity	1582d 07h	/neorv32/trunk/sw/lib/include/
4	see NEORV32.pdf for changelog	zero_gravity	1590d 17h	/neorv32/trunk/sw/lib/include/
3	general updates, see changelog in NEORV32.pdf for more information	zero_gravity	1592d 10h	/neorv32/trunk/sw/lib/include/
2	- initial commit	zero_gravity	1593d 11h	/neorv32/trunk/sw/lib/include/