OpenCores
URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [sw/] [lib/] [include/] - Rev 14

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
14 update to HW version 1.3.0.0
see changelog in NEORV32.pdf for more information
zero_gravity 1416d 12h /neorv32/trunk/sw/lib/include/
13 updates, optimizations and bug fixes; see changelog in NEORV32.pdf zero_gravity 1420d 04h /neorv32/trunk/sw/lib/include/
12 Processor version 1.2.0.5 - see changelog in NEORV32.pdf zero_gravity 1421d 11h /neorv32/trunk/sw/lib/include/
11 new hardware version, see changelog in NEORV32.pdf zero_gravity 1431d 06h /neorv32/trunk/sw/lib/include/
10 minor updates and front page modifications zero_gravity 1434d 04h /neorv32/trunk/sw/lib/include/
9 minor edits and updates zero_gravity 1434d 06h /neorv32/trunk/sw/lib/include/
8 added missing FENCE instruction; added optional Zifencei CPU extension zero_gravity 1435d 04h /neorv32/trunk/sw/lib/include/
7 removed "mtinst" CSR since it is not ratified yet by the RISC-V specs zero_gravity 1435d 07h /neorv32/trunk/sw/lib/include/
6 new processor version: 1.0.0.0 -> increased performance; debugged errors; processor now passes risc-v compliance tests; see changelog for more information zero_gravity 1436d 03h /neorv32/trunk/sw/lib/include/
4 see NEORV32.pdf for changelog zero_gravity 1444d 12h /neorv32/trunk/sw/lib/include/
3 general updates, see changelog in NEORV32.pdf for more information zero_gravity 1446d 06h /neorv32/trunk/sw/lib/include/
2 - initial commit zero_gravity 1447d 07h /neorv32/trunk/sw/lib/include/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.