URL https://opencores.org/ocsvn/next186_soc_pc/next186_soc_pc/trunk

Subversion Repositories next186_soc_pc

[/] [next186_soc_pc/] [trunk/] - Rev 15

Rev	Log message	Author	Age	Path
15		ndumitrache	1944d 21h	/next186_soc_pc/trunk/
14	Ported on Chameleon V2 board: Cyclone10LP-8, 32MB SDRAM at 185Mhz, 100Mhz bus, 50Mhz CPU, 90Mhz DSP, 8KB cache.	ndumitrache	1944d 21h	/next186_soc_pc/trunk/
13		ndumitrache	1944d 21h	/next186_soc_pc/trunk/
12		ndumitrache	2284d 21h	/next186_soc_pc/trunk/
11		ndumitrache	2335d 03h	/next186_soc_pc/trunk/
10	Adlib/OPL3 for Nexys4 board	ndumitrache	2621d 01h	/next186_soc_pc/trunk/
9		ndumitrache	2681d 20h	/next186_soc_pc/trunk/
8	Lattice Mach XO2 + SDRAM port (FleaFPGA)	ndumitrache	3686d 21h	/next186_soc_pc/trunk/
7	Disable interrupts in VESAMemControl callback	ndumitrache	3810d 20h	/next186_soc_pc/trunk/
6		ndumitrache	3990d 03h	/next186_soc_pc/trunk/
5	updated Next186 CPU	ndumitrache	3990d 03h	/next186_soc_pc/trunk/
4	fix BIOS int 1ah (Get system time)	ndumitrache	4021d 02h	/next186_soc_pc/trunk/
3		ndumitrache	4024d 04h	/next186_soc_pc/trunk/
2		ndumitrache	4024d 04h	/next186_soc_pc/trunk/
1	The project and the structure was created	root	4024d 21h	/next186_soc_pc/trunk/