OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] - Rev 289

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
289 Added back the delay for the cursor home command, since it is slow on most Hitachi compatible LCD panels. jshamlet 1145d 18h /open8_urisc/
288 Removed hard-wired R/Wn output and replaced it with a note that the R/Wn line must be tied low either in firmware or on the board. jshamlet 1146d 15h /open8_urisc/
287 Fixed mangled comments and revisioning dates. jshamlet 1147d 14h /open8_urisc/
286 Added initial cut of a "universal" character LCD driver. Allows for adjustment of address setup, enable high, and cycle times. Also has built-in timers for handling timing on certain commands. jshamlet 1147d 14h /open8_urisc/
285 Added checksum byte to vector tx/rx to avoid issues with serial line noise glitching the receiver. Also modified the transmitted to take any generic argument, rather than canned arguments. jshamlet 1154d 17h /open8_urisc/
284 Corrected the vhdl unit name and description for o8_7seg.vhd jshamlet 1268d 04h /open8_urisc/
283 Altered SDLC bitclock check on TX to NOT block when tested by software, but to instead ignore packet write requests if BClk_Okay is low. This allows software to continue checking BClk_Okay in a polling loop. jshamlet 1271d 16h /open8_urisc/
282 Modified the SDLC core transmit states to have consistent naming. jshamlet 1271d 16h /open8_urisc/
281 Added pre-initialization to the dual-port RAM signals. jshamlet 1271d 19h /open8_urisc/
280 Got rid of silly aliases that connected the dual-port memory and the arbitration logic. jshamlet 1271d 20h /open8_urisc/
279 More comment cleanup jshamlet 1272d 17h /open8_urisc/
278 Flattened the SDLC interface to fewer files and eliminated the package file. jshamlet 1273d 11h /open8_urisc/
277 Fixed documentation errors related to flags. The UPP ALU instruction only alters the C flag, not the Z or N flags. This implies that using indexed loads or stores with auto post-increment will potentially alter the C flag. jshamlet 1273d 16h /open8_urisc/
276 More comment fixes jshamlet 1308d 13h /open8_urisc/
275 Fixed a minor comment error. jshamlet 1310d 07h /open8_urisc/
274 Updated comments with more corrections jshamlet 1310d 14h /open8_urisc/
273 Updated comments with corrections jshamlet 1310d 16h /open8_urisc/
272 Updated the HTML documentation to reflect the removed generic. jshamlet 1320d 15h /open8_urisc/
271 Removed deleted generic define. jshamlet 1320d 15h /open8_urisc/
270 Moved CPU internal constants to o8_cpu.vhd and replace the generic that set the RSP direction flag with a constant instead. This removes the need to expose internal architectural flags externally.

Also added a hard-coded version register that takes a major and minor value as bytes using generics. This is a read-only register to the CPU.
jshamlet 1320d 15h /open8_urisc/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.