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[/] [open8_urisc/] - Rev 325

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Rev Log message Author Age Path
325 Added the rest of the initializers to the signal assignments jshamlet 409d 00h /open8_urisc/
324 Modified the Open8 version of the multi-channel roll average code to have separate interrupt enables for average and flush operations. Note that the flush status bit should be checked by software prior to use if the Autoflush_On_Reset generic is set TRUE.

Also adding the ROMTAPE entity, which acts as a serial-access ROM for storing strings, arrays, etc. in order to alleviate pressure on the primary program ROM. It is intended for use with loops that load fixed content from ROM.		 jshamlet 409d 01h /open8_urisc/
323 Forgot to add files jshamlet 409d 23h /open8_urisc/
322 Performance fixes for the LCD interface,
Fixed incorrect entity name for the dual LTC2355 IF,
Added a CPU-accessible 8-channel averager core and FIFO-style ROM		 jshamlet 409d 23h /open8_urisc/
321 Fixed issue with parity flag in receiver sticking jshamlet 513d 16h /open8_urisc/
320 Inverted flow control signals to match EIA-232 specification jshamlet 515d 19h /open8_urisc/
319 Fixed off-by-one error in channel count jshamlet 516d 22h /open8_urisc/
318 Added o8_scale_conv.vhd and intdiv.vhd jshamlet 521d 00h /open8_urisc/
317 Altered the reinit signal on teh adc128s022.vhd driver to be optional, and removed the "dead" signal from the upper level o8_de0_nano_adc_if.vhd code. jshamlet 534d 21h /open8_urisc/
316 More code cleanup and comments,
Removed INT_VECTOR_n constants, as they are superfluous. There are no reasonable situations in which the constants would be altered.		 jshamlet 534d 21h /open8_urisc/
315 Added Terasic DE0 Nano ADC interface and rolling averager. jshamlet 534d 22h /open8_urisc/
314 Code cleanup and added comments jshamlet 534d 23h /open8_urisc/
313 Added all generics to package component jshamlet 535d 00h /open8_urisc/
312 Added o8_timer24.vhd as a more flexible alternative to o8_sys_timer_ii.vhd.
Also cleaned up some comments in the HTML documentation		 jshamlet 535d 01h /open8_urisc/
311 Updated documentation to reflect generic switch controlling ROR/ROL behavior and the carry bit jshamlet 578d 21h /open8_urisc/
310 Added optional DACadv signal to advance the PWM engine using an external signal. This is used to synchronize the DAC with other DACs or for streaming multiple streams across a high-speed serial link. jshamlet 606d 02h /open8_urisc/
309 Comment cleanup jshamlet 616d 10h /open8_urisc/
308 jshamlet 627d 17h /open8_urisc/
307 Fixed comments on o8_version.vhd jshamlet 835d 02h /open8_urisc/
306 Moved REINIT_TASK_TABLE_PTR call to INITIALIZE_TASK_STACK jshamlet 839d 04h /open8_urisc/

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