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[/] [open8_urisc/] [trunk/] [VHDL/] - Rev 163

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162 Added optional generic to specify that the BRK instruction implements a WAit_for_Interrupt (WAI) instruction instead. Logically emulates INT, but without triggering a soft interrupt. Note that the NOP instruction maps to BRK, and will not function correctly if this option is set. jshamlet 4655d 09h /open8_urisc/trunk/VHDL/
156 Optimized for timing,
Flattened block structure to single entity.		 jshamlet 4712d 00h /open8_urisc/trunk/VHDL/
155 Fixed additional interrupt logic bug,
Optimized several blocks - including ALU, stack, program counter, and data path.		 jshamlet 4712d 19h /open8_urisc/trunk/VHDL/
154 Fixed problem with missing data path override in interrupt logic. Should resolve issues with processor crashing when an interrupt occurs as a STO instruction is being executed. jshamlet 4717d 21h /open8_urisc/trunk/VHDL/
153 Fixed bug in interrupt logic that caused stack pointer to increment if interrupt occurred as specific instructions were being decoded,
Fixed bug in interrupt logic where instruction caching would remain enabled during an interrupt, causing improper execution depending on what instruction was in the decode stage as the interrupt is trigered.		 jshamlet 4744d 17h /open8_urisc/trunk/VHDL/
151 Fixed STO instruction and interrupt logic to avoid address bus corruption issues. jshamlet 4754d 20h /open8_urisc/trunk/VHDL/
10 corrected implementation for BTT to match V8/ARClite definition, changed sense of reset, corrected comments to match source values khays 4896d 05h /open8_urisc/trunk/VHDL/
8 Need to learn SVN... jshamlet 5224d 16h /open8_urisc/trunk/VHDL/
7 Initial Upload jshamlet 5224d 16h /open8_urisc/trunk/open8_urisc/VHDL/

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