| Rev |
Log message |
Author |
Age |
Path |
| 194 |
Cleaned up licensing sections |
jshamlet |
1528d 16h |
/open8_urisc/trunk/VHDL/ |
| 193 |
Fixed incorrect comment in o8_alu16.vhd. The value of the write to 0x1F doesn't matter, as the write itself triggers the calculation. |
jshamlet |
1528d 17h |
/open8_urisc/trunk/VHDL/ |
| 192 |
Added SDLC packet engine |
jshamlet |
1528d 17h |
/open8_urisc/trunk/VHDL/ |
| 191 |
Cleaned up comments, added back the OPEN8_NULLBUS constant, and added some new modules for ADCs and LCD displays.
Also made the button input module more configurable by moving the debounce code to a separate entity and using generics to instantiate it. |
jshamlet |
1528d 17h |
/open8_urisc/trunk/VHDL/ |
| 190 |
Fixed a bug in CPU where RTI/RTS wasn't idling the instruction cache, causing intermittent failures where RTI would execute as RTS, corrupting the stack;
Fixed a bug in the real-time clock where the uSec tick generator would stop if the PIT timer value was left/set to 0x00. |
jshamlet |
1540d 14h |
/open8_urisc/trunk/VHDL/ |
| 189 |
Merged changes from private repository,
added ceil_log2 function to Open8_pkg, since it is used to calculate RAM vectors,
cleaned up comments and removed local copies of the ceil_log2 function from peripherals. |
jshamlet |
1541d 15h |
/open8_urisc/trunk/VHDL/ |
| 188 |
Added a generic to alter the behavior of RTI so that it can optionally skip restoring the general purpose flags GP4 to GP7, allowing ISR's to make persistent changes to them. Also exported these flags to the top level for use outside the CPU. |
jshamlet |
1541d 18h |
/open8_urisc/trunk/VHDL/ |
| 187 |
Added the CPU_Halt input, only now as an input to the instruction decoder. The CPU_Halt line will assert the registered CPU_Halt_Req, which will cause the instruction decoder to abort the current instruction, reset the PC, then enter a hold state until the line is deasserted. Additionally, a very minor bug that could cause the SMSK instruction to effectively execute twice if interrupted was fixed. Lastly, cleaned up the comments even more. |
jshamlet |
1543d 14h |
/open8_urisc/trunk/VHDL/ |
| 186 |
Merged the interrupt override logic into the case structure, simplifying how interrupts are processed. |
jshamlet |
1546d 14h |
/open8_urisc/trunk/VHDL/ |
| 185 |
1) Fixed an apparently long-standing bug where the interrupt bit wasn't being cleared after an RTI
2) Modified the program counter logic to be simpler. It now always increments, and states control the increment using the offset field. A new set of constants was added to replace the old states.
3) Modified the ALU to always use Operand1 instead of ALU_Ctrl.Data (and removed the field in the record). A new ALU command, ALU_GMSK, was added, as it was the only instruction to set the .Data field to something other than Operand1 (Int_Mask)
4) Modified the package file so that flag names match what the assembler calls them. FL_Z is now PSR_Z, FL_GP1 is now PSR_GP4, etc.
5) Cleaned up the comments and code formatting |
jshamlet |
1546d 17h |
/open8_urisc/trunk/VHDL/ |
| 184 |
More file/entity renaming to match private versions. |
jshamlet |
1548d 16h |
/open8_urisc/trunk/VHDL/ |
| 183 |
Renamed core to o8_cpu to match new naming scheme |
jshamlet |
1548d 17h |
/open8_urisc/trunk/VHDL/ |
| 182 |
Simplified the address generation logic at the expense of making LDX take one additional clock cycle. This allowed the address logic to be split out of the main state machine and simplified (greatly). During this process, a bug in SDO was found and fixed that caused it to return through the wrong pipe fill state wnen auto increment was disabled. |
jshamlet |
1548d 17h |
/open8_urisc/trunk/VHDL/ |
| 181 |
Altered the RSP instruction to allow the stack pointed to either be restored from registers or stored to registers based on the status of a processor bit. Also modified LDX to simplify the address logic. |
jshamlet |
1549d 13h |
/open8_urisc/trunk/VHDL/ |
| 180 |
Added additional Open8 compatible modules |
jshamlet |
1553d 17h |
/open8_urisc/trunk/VHDL/ |
| 177 |
Fixed comments in RTC module |
jshamlet |
2873d 17h |
/open8_urisc/trunk/VHDL/ |
| 176 |
Fixed documentation errors,
Modified uSec_Tick such that it is always generated regardless of the interval. |
jshamlet |
2878d 15h |
/open8_urisc/trunk/VHDL/ |
| 175 |
Added 4 and 8-bit LCD interfaces with backlight and contrast DACs |
jshamlet |
2878d 20h |
/open8_urisc/trunk/VHDL/ |
| 174 |
Added ROM/RAM wrappers |
jshamlet |
3073d 14h |
/open8_urisc/trunk/VHDL/ |
| 173 |
Added a couple of useful interfaces for detecting button presses and clock changes. |
jshamlet |
3073d 15h |
/open8_urisc/trunk/VHDL/ |
