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[/] [open_hitter/] [trunk/] - Rev 22

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Rev Log message Author Age Path
22 mixed rising_edge / falling_edge logic removed stvhawes 3273d 22h /open_hitter/trunk/
21 flakey sim bugs (1/10 test 2 fails) stvhawes 3274d 00h /open_hitter/trunk/
20 search_control_sim prepped stvhawes 3280d 19h /open_hitter/trunk/
19 search_control is up for simulation (ghdl) - tidied extra testbenches stvhawes 3287d 18h /open_hitter/trunk/
18 search_control is up for simulation (ghdl) stvhawes 3287d 18h /open_hitter/trunk/
17 persistent bug: search_control_wrapper.vhd:230:21:@36us:(assertion error): search_control_wrapper: test: 3 bad id stvhawes 3293d 05h /open_hitter/trunk/
16 minor fixes to search_control test bench stvhawes 3299d 16h /open_hitter/trunk/
15 adding in search_control and testbench stvhawes 3300d 20h /open_hitter/trunk/
14 search_item_wrapper bench debugged stvhawes 3306d 17h /open_hitter/trunk/
13 test bench for search_item stvhawes 3309d 21h /open_hitter/trunk/
12 wrapper test for search_item stvhawes 3315d 07h /open_hitter/trunk/
11 multiplex searh item added stvhawes 3315d 23h /open_hitter/trunk/
10 split source files to sime and rtl stvhawes 3329d 22h /open_hitter/trunk/
9 highlevel block diagram added stvhawes 3330d 19h /open_hitter/trunk/
8 sim sequence error fixed, so 20% success -> 100% success for unit test on fpga stvhawes 3330d 21h /open_hitter/trunk/
7 split clock/byte_ready and fix logic stvhawes 3335d 15h /open_hitter/trunk/
6 fixing synthesizable stvhawes 3336d 23h /open_hitter/trunk/
5 fixing synthesizable stvhawes 3337d 04h /open_hitter/trunk/
4 developing ideas around unit test / fpga verification stvhawes 3337d 16h /open_hitter/trunk/
3 developing ideas around unit test / fpga verification stvhawes 3337d 16h /open_hitter/trunk/

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