URL https://opencores.org/ocsvn/open_hitter/open_hitter/trunk

Subversion Repositories open_hitter

[/] [open_hitter/] [trunk/] [bench/] - Rev 10

Rev	Log message	Author	Age	Path
10	split source files to sime and rtl	stvhawes	3407d 17h	/open_hitter/trunk/bench/
8	sim sequence error fixed, so 20% success -> 100% success for unit test on fpga	stvhawes	3408d 16h	/open_hitter/trunk/bench/
7	split clock/byte_ready and fix logic	stvhawes	3413d 10h	/open_hitter/trunk/bench/
6	fixing synthesizable	stvhawes	3414d 18h	/open_hitter/trunk/bench/
5	fixing synthesizable	stvhawes	3414d 23h	/open_hitter/trunk/bench/
3	developing ideas around unit test / fpga verification	stvhawes	3415d 11h	/open_hitter/trunk/bench/
2	initial sources, wrappers for regression test harness	stvhawes	3426d 13h	/open_hitter/trunk/bench/