URL https://opencores.org/ocsvn/open_hitter/open_hitter/trunk

Subversion Repositories open_hitter

[/] [open_hitter/] [trunk/] [bench/] - Rev 20

Rev	Log message	Author	Age	Path
20	search_control_sim prepped	stvhawes	3301d 01h	/open_hitter/trunk/bench/
19	search_control is up for simulation (ghdl) - tidied extra testbenches	stvhawes	3308d 00h	/open_hitter/trunk/bench/
18	search_control is up for simulation (ghdl)	stvhawes	3308d 00h	/open_hitter/trunk/bench/
17	persistent bug: search_control_wrapper.vhd:230:21:@36us:(assertion error): search_control_wrapper: test: 3 bad id	stvhawes	3313d 11h	/open_hitter/trunk/bench/
16	minor fixes to search_control test bench	stvhawes	3319d 22h	/open_hitter/trunk/bench/
15	adding in search_control and testbench	stvhawes	3321d 02h	/open_hitter/trunk/bench/
14	search_item_wrapper bench debugged	stvhawes	3326d 23h	/open_hitter/trunk/bench/
13	test bench for search_item	stvhawes	3330d 03h	/open_hitter/trunk/bench/
12	wrapper test for search_item	stvhawes	3335d 13h	/open_hitter/trunk/bench/
10	split source files to sime and rtl	stvhawes	3350d 04h	/open_hitter/trunk/bench/
8	sim sequence error fixed, so 20% success -> 100% success for unit test on fpga	stvhawes	3351d 03h	/open_hitter/trunk/bench/
7	split clock/byte_ready and fix logic	stvhawes	3355d 20h	/open_hitter/trunk/bench/
6	fixing synthesizable	stvhawes	3357d 05h	/open_hitter/trunk/bench/
5	fixing synthesizable	stvhawes	3357d 10h	/open_hitter/trunk/bench/
3	developing ideas around unit test / fpga verification	stvhawes	3357d 21h	/open_hitter/trunk/bench/
2	initial sources, wrappers for regression test harness	stvhawes	3369d 00h	/open_hitter/trunk/bench/