URL https://opencores.org/ocsvn/open_hitter/open_hitter/trunk

Subversion Repositories open_hitter

[/] [open_hitter/] [trunk/] [bench/] [vhdl/] - Rev 19

Rev	Log message	Author	Age	Path
19	search_control is up for simulation (ghdl) - tidied extra testbenches	stvhawes	3376d 21h	/open_hitter/trunk/bench/vhdl/
18	search_control is up for simulation (ghdl)	stvhawes	3376d 21h	/open_hitter/trunk/bench/vhdl/
17	persistent bug: search_control_wrapper.vhd:230:21:@36us:(assertion error): search_control_wrapper: test: 3 bad id	stvhawes	3382d 08h	/open_hitter/trunk/bench/vhdl/
16	minor fixes to search_control test bench	stvhawes	3388d 18h	/open_hitter/trunk/bench/vhdl/
15	adding in search_control and testbench	stvhawes	3389d 23h	/open_hitter/trunk/bench/vhdl/
14	search_item_wrapper bench debugged	stvhawes	3395d 19h	/open_hitter/trunk/bench/vhdl/
13	test bench for search_item	stvhawes	3399d 00h	/open_hitter/trunk/bench/vhdl/
12	wrapper test for search_item	stvhawes	3404d 09h	/open_hitter/trunk/bench/vhdl/
10	split source files to sime and rtl	stvhawes	3419d 01h	/open_hitter/trunk/bench/vhdl/
8	sim sequence error fixed, so 20% success -> 100% success for unit test on fpga	stvhawes	3420d 00h	/open_hitter/trunk/bench/vhdl/
7	split clock/byte_ready and fix logic	stvhawes	3424d 17h	/open_hitter/trunk/bench/vhdl/
6	fixing synthesizable	stvhawes	3426d 02h	/open_hitter/trunk/bench/vhdl/
5	fixing synthesizable	stvhawes	3426d 06h	/open_hitter/trunk/bench/vhdl/
3	developing ideas around unit test / fpga verification	stvhawes	3426d 18h	/open_hitter/trunk/bench/vhdl/
2	initial sources, wrappers for regression test harness	stvhawes	3437d 21h	/open_hitter/trunk/bench/vhdl/