URL https://opencores.org/ocsvn/open_hitter/open_hitter/trunk

Subversion Repositories open_hitter

[/] [open_hitter/] [trunk/] [bench/] [vhdl/] - Rev 9

Rev	Log message	Author	Age	Path
8	sim sequence error fixed, so 20% success -> 100% success for unit test on fpga	stvhawes	3476d 01h	/open_hitter/trunk/bench/vhdl/
7	split clock/byte_ready and fix logic	stvhawes	3480d 18h	/open_hitter/trunk/bench/vhdl/
6	fixing synthesizable	stvhawes	3482d 03h	/open_hitter/trunk/bench/vhdl/
5	fixing synthesizable	stvhawes	3482d 07h	/open_hitter/trunk/bench/vhdl/
3	developing ideas around unit test / fpga verification	stvhawes	3482d 19h	/open_hitter/trunk/bench/vhdl/
2	initial sources, wrappers for regression test harness	stvhawes	3493d 22h	/open_hitter/trunk/bench/vhdl/