| Rev |
Log message |
Author |
Age |
Path |
| 49 |
Moved the location of the ZIPSYSTEM in memory, made the artyboard.h constants
more friendly and more complete, fixed two bugs in the CPU (jumps to breaks,
and s/w clearing of icache), added a NO_USERMODE option to the CPU, and more.
Rebuild any user programs before using this build. |
dgisselq |
2763d 11h |
/openarty/trunk/bench/cpp/ |
| 47 |
Updated. |
dgisselq |
2783d 15h |
/openarty/trunk/bench/cpp/ |
| 46 |
Sped the UART simulator back up to 1MBaud. |
dgisselq |
2783d 15h |
/openarty/trunk/bench/cpp/ |
| 45 |
Updated the flash, and the flash test bench, for Quad I/O read commands. |
dgisselq |
2783d 15h |
/openarty/trunk/bench/cpp/ |
| 36 |
Lots of changes, see the git changelog for details. |
dgisselq |
2790d 00h |
/openarty/trunk/bench/cpp/ |
| 34 |
These updates bring the distribution along to the point where both the GPS
clock subsecond tracking, as well as the OLEDrgb controller now work. |
dgisselq |
2793d 14h |
/openarty/trunk/bench/cpp/ |
| 33 |
Fixed the network receive CRC and MAC checking, and added ip-checking and
minimum packet length checking to the receiver. |
dgisselq |
2798d 20h |
/openarty/trunk/bench/cpp/ |
| 32 |
Brought the CPU to its first working version, to include demo. |
dgisselq |
2799d 23h |
/openarty/trunk/bench/cpp/ |
| 30 |
Network transmit and MIG memory both work now, though the clock speed has
been dropped to 80.125MHz. |
dgisselq |
2800d 15h |
/openarty/trunk/bench/cpp/ |
| 28 |
Including the updates and corrections from the wbuart32 project. |
dgisselq |
2828d 12h |
/openarty/trunk/bench/cpp/ |
| 15 |
These files were changed/perfected as part of getting the EQSPI flash driver
up and running. They currently match the hardware, as far as I can tell, and
the test bench (_tb.cpp file) shows that the Verilog modules work (with the
simulated hardware) as designed. |
dgisselq |
2867d 16h |
/openarty/trunk/bench/cpp/ |
| 11 |
Files necessary to simulate the entire Arty board--everything at the fastmaster
module and below. |
dgisselq |
2868d 19h |
/openarty/trunk/bench/cpp/ |
| 10 |
Updated flash data and test files, for a flash that produces it's answers a
clock after I'm expecting them. |
dgisselq |
2868d 19h |
/openarty/trunk/bench/cpp/ |
| 9 |
Adding copywrite statement (oops). |
dgisselq |
2868d 19h |
/openarty/trunk/bench/cpp/ |
| 8 |
Fixes the makefile so it builds a complete testbench suite, emulating the
entire Arty board. |
dgisselq |
2868d 19h |
/openarty/trunk/bench/cpp/ |
| 5 |
Initial checkin, this time of the bench testing s/w. |
dgisselq |
2883d 22h |
/openarty/trunk/bench/cpp/ |
