OpenCores
URL https://opencores.org/ocsvn/openarty/openarty/trunk

Subversion Repositories openarty

[/] [openarty/] [trunk/] [sw/] [board/] - Rev 33

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
33 Fixed the network receive CRC and MAC checking, and added ip-checking and
minimum packet length checking to the receiver.
dgisselq 2775d 03h /openarty/trunk/sw/board/
32 Brought the CPU to its first working version, to include demo. dgisselq 2776d 06h /openarty/trunk/sw/board/
31 Initial network is now working. Adding CPU control files to repository. dgisselq 2776d 23h /openarty/trunk/sw/board/
30 Network transmit and MIG memory both work now, though the clock speed has
been dropped to 80.125MHz.
dgisselq 2776d 23h /openarty/trunk/sw/board/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.