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[/] [openarty/] [trunk/] [sw/] [host/] - Rev 49

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Rev Log message Author Age Path
49 Moved the location of the ZIPSYSTEM in memory, made the artyboard.h constants
more friendly and more complete, fixed two bugs in the CPU (jumps to breaks,
and s/w clearing of icache), added a NO_USERMODE option to the CPU, and more.
Rebuild any user programs before using this build.		 dgisselq 2761d 23h /openarty/trunk/sw/host/
38 ZipLoad can now load programs to non-reset locations. dgisselq 2782d 03h /openarty/trunk/sw/host/
37 Updated documentation and copyright. dgisselq 2782d 03h /openarty/trunk/sw/host/
36 Lots of changes, see the git changelog for details. dgisselq 2788d 12h /openarty/trunk/sw/host/
34 These updates bring the distribution along to the point where both the GPS
clock subsecond tracking, as well as the OLEDrgb controller now work.		 dgisselq 2792d 01h /openarty/trunk/sw/host/
33 Fixed the network receive CRC and MAC checking, and added ip-checking and
minimum packet length checking to the receiver.		 dgisselq 2797d 08h /openarty/trunk/sw/host/
32 Brought the CPU to its first working version, to include demo. dgisselq 2798d 10h /openarty/trunk/sw/host/
31 Initial network is now working. Adding CPU control files to repository. dgisselq 2799d 03h /openarty/trunk/sw/host/
30 Network transmit and MIG memory both work now, though the clock speed has
been dropped to 80.125MHz.		 dgisselq 2799d 03h /openarty/trunk/sw/host/
22 A useful script for programming the device, given that the current device
program includes a valid comms interface.		 dgisselq 2864d 03h /openarty/trunk/sw/host/
18 The device can now program and configure itself, allowing bootstrap possibilities.
`		 dgisselq 2864d 03h /openarty/trunk/sw/host/
16 This returns the scope to its original configuration, where the decode()
function is not allowed to have any side effects.		 dgisselq 2866d 03h /openarty/trunk/sw/host/
14 All changes made as a part of getting the flash driver up and running. Today,
it successfully programmed a configuration into the Arty via wbprogram, so ...
that's been my last/best test.		 dgisselq 2866d 04h /openarty/trunk/sw/host/
6 Minor updates, mostly to support the development of the DDR3 SDRAM--such
as creating addresses for the debugging scope used to figure out what's
going on with it.		 dgisselq 2867d 07h /openarty/trunk/sw/host/
4 Initial host software pack. dgisselq 2882d 10h /openarty/trunk/sw/host/

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