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71 Update the FPGA example projects with the newer openMSP430 core including the hardware multiplier. olivier.girard 5251d 14h /openmsp430/trunk/
70 Add Area and Speed documentation. olivier.girard 5251d 17h /openmsp430/trunk/
69 Update HTML documentation with 16x16 hardware multiplier info. olivier.girard 5251d 22h /openmsp430/trunk/
68 Update synthesis scripts with the hardware multiplier support. olivier.girard 5251d 22h /openmsp430/trunk/
67 Added 16x16 Hardware Multiplier. olivier.girard 5251d 22h /openmsp430/trunk/
66 The peripheral templates are now under BSD license.
Developers of new peripherals based on these templates won't have to disclose their code.		 olivier.girard 5252d 02h /openmsp430/trunk/
65 Add possibility to disable waveform dumping by setting the OMSP_NODUMP environment variable to 1. olivier.girard 5262d 13h /openmsp430/trunk/
64 Add Actel synthesis environment for size and speed analysis. olivier.girard 5272d 22h /openmsp430/trunk/
63 Add Altera synthesis environment for size and speed analysis. olivier.girard 5272d 23h /openmsp430/trunk/
62 Add Xilinx synthesis environment for size&speed analysis. olivier.girard 5273d 01h /openmsp430/trunk/
61 Update openMSP430 rtl. olivier.girard 5283d 12h /openmsp430/trunk/
60 Cleanup of the PC (R0) generation logic.
Formal equivalence was shown between the new and old code with Synopsys' Formality (to make sure that nothing has been broken :-P ).		 olivier.girard 5283d 13h /openmsp430/trunk/
59 Update the FPGA projects with the latest core design updates. olivier.girard 5285d 11h /openmsp430/trunk/
58 Update the debug hardware breakpoint verification patterns to reflect the latest design updates. olivier.girard 5285d 11h /openmsp430/trunk/
57 Update design to exclude the range mode from the debug hardware breakpoint units. As this feature is not used by GDB, it has been disabled in order to improve the timings and save a bit of area/utilisation.
Note that if required, this feature can be re-enabled through the `HWBRK_RANGE define located in the "openMSP430_defines.v" file.		 olivier.girard 5285d 12h /openmsp430/trunk/
56 Update Design Compiler Synthesis scripts. olivier.girard 5289d 18h /openmsp430/trunk/
55 Add a "sandbox" test pattern to play around with the simulation :-P olivier.girard 5290d 13h /openmsp430/trunk/
54 Update FPGA projects with the combinatorial loop fixed. olivier.girard 5290d 16h /openmsp430/trunk/
53 Fixed the following combinatorial timing loop:
1- irq_detect (omsp_frontend)
2- decode (omsp_frontend)
3- dbg_swbrk (omsp_dbg)
4- halt_flag_set (omsp_dbg)
6- dbg_halt_cmd (omsp_dbg)
7- irq_detect (omsp_frontend)

Without this fix, problem could occur whenever an IRQ request arrives during a software breakpoint instruction fetch.		 olivier.girard 5290d 16h /openmsp430/trunk/
52 Re-add pdf documentation. olivier.girard 5295d 12h /openmsp430/trunk/

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