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[/] [openmsp430/] [trunk/] - Rev 76

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76 Add possibility to simulate C code within the "core" environment. olivier.girard 5099d 19h /openmsp430/trunk/
75 Update development tools windows executable to support memories whose size are not a power of 2. olivier.girard 5181d 19h /openmsp430/trunk/
74 Update serial debug interface to support memories with a size which is not a power of 2.
Update the software tools accordingly.		 olivier.girard 5181d 20h /openmsp430/trunk/
73 Update all bash scripts headers with "#!/bin/bash" instead of "#!/bin/sh".
This will prevent compatibility problems in systems where bash isn't the default shell.		 olivier.girard 5206d 20h /openmsp430/trunk/
72 Expand configurability options of the program and data memory sizes. olivier.girard 5208d 21h /openmsp430/trunk/
71 Update the FPGA example projects with the newer openMSP430 core including the hardware multiplier. olivier.girard 5355d 20h /openmsp430/trunk/
70 Add Area and Speed documentation. olivier.girard 5355d 23h /openmsp430/trunk/
69 Update HTML documentation with 16x16 hardware multiplier info. olivier.girard 5356d 03h /openmsp430/trunk/
68 Update synthesis scripts with the hardware multiplier support. olivier.girard 5356d 04h /openmsp430/trunk/
67 Added 16x16 Hardware Multiplier. olivier.girard 5356d 04h /openmsp430/trunk/
66 The peripheral templates are now under BSD license.
Developers of new peripherals based on these templates won't have to disclose their code.		 olivier.girard 5356d 08h /openmsp430/trunk/
65 Add possibility to disable waveform dumping by setting the OMSP_NODUMP environment variable to 1. olivier.girard 5366d 18h /openmsp430/trunk/
64 Add Actel synthesis environment for size and speed analysis. olivier.girard 5377d 04h /openmsp430/trunk/
63 Add Altera synthesis environment for size and speed analysis. olivier.girard 5377d 04h /openmsp430/trunk/
62 Add Xilinx synthesis environment for size&speed analysis. olivier.girard 5377d 06h /openmsp430/trunk/
61 Update openMSP430 rtl. olivier.girard 5387d 18h /openmsp430/trunk/
60 Cleanup of the PC (R0) generation logic.
Formal equivalence was shown between the new and old code with Synopsys' Formality (to make sure that nothing has been broken :-P ).		 olivier.girard 5387d 19h /openmsp430/trunk/
59 Update the FPGA projects with the latest core design updates. olivier.girard 5389d 17h /openmsp430/trunk/
58 Update the debug hardware breakpoint verification patterns to reflect the latest design updates. olivier.girard 5389d 17h /openmsp430/trunk/
57 Update design to exclude the range mode from the debug hardware breakpoint units. As this feature is not used by GDB, it has been disabled in order to improve the timings and save a bit of area/utilisation.
Note that if required, this feature can be re-enabled through the `HWBRK_RANGE define located in the "openMSP430_defines.v" file.		 olivier.girard 5389d 17h /openmsp430/trunk/

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