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[/] [openmsp430/] [trunk/] [core/] - Rev 185

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180 Add new ASIC_CLOCKING configuration option to allow ASIC implementations with FPGA clocking scheme.
Thanks to Sebastien Van Cauwenberghe's contribution :-)
olivier.girard 4114d 16h /openmsp430/trunk/core/
178 Update all linker scripts with a simplified version.
Thanks to Mihai M. for this one :-)
olivier.girard 4123d 16h /openmsp430/trunk/core/
175 Update hardware breakpoint unit with the followings:
- fixed hardware breakpoint bug with CALL instructions.
- modified data read watchpoint behavior to also trigger with read/modify/write instructions.
- removed unused ports.
olivier.girard 4140d 16h /openmsp430/trunk/core/
174 Cleanup dmem_wr generation logic. Important note: this is not a bug fix, only beautification. olivier.girard 4140d 16h /openmsp430/trunk/core/
154 The serial debug interface now supports the I2C protocol (in addition to the UART) olivier.girard 4247d 17h /openmsp430/trunk/core/
151 Add possibility to configure custom Program, Data and Peripheral memory sizes. olivier.girard 4332d 15h /openmsp430/trunk/core/
149 Update simulation regression result parser.
Fixed failing SFR test (due to newer MSPGCC version).
Implement request http://opencores.org/bug,view,2171 (burst accesses through the serial debug interface)
olivier.girard 4335d 17h /openmsp430/trunk/core/
145 Add Dhrystone and CoreMark benchmarks to the simulation environment. olivier.girard 4385d 16h /openmsp430/trunk/core/
142 Beautify the linker script examples. olivier.girard 4406d 17h /openmsp430/trunk/core/
141 Update verification environment to support MSPGCC Uniarch (based on GCC 4.5 and later) olivier.girard 4410d 16h /openmsp430/trunk/core/
139 Add some SVN ignore patterns olivier.girard 4423d 02h /openmsp430/trunk/core/
138 Update simulation scripts to support Cygwin out of the box for Windows users. olivier.girard 4423d 02h /openmsp430/trunk/core/
134 Add full ASIC support (low-power modes, DFT, ...).
Improved serial debug interface reliability.
olivier.girard 4454d 17h /openmsp430/trunk/core/
132 Update FPGA examples with the POP.B bug fix olivier.girard 4467d 17h /openmsp430/trunk/core/
130 Fixed POP.B bug (see Bugtracker http://opencores.org/bug,assign,2137 ) olivier.girard 4475d 16h /openmsp430/trunk/core/
128 Fixed CALL x(SR) bug (see Bugtracker http://opencores.org/bug,view,2111 ) olivier.girard 4551d 16h /openmsp430/trunk/core/
122 Add coverage report generation (NCVERILOG only)
Add support for the ISIM Xilinx simulator.
olivier.girard 4623d 17h /openmsp430/trunk/core/
117 To facilitate commercial adoption of the openMSP430, the core has moved to a modified BSD license. olivier.girard 4727d 18h /openmsp430/trunk/core/
115 Add linker script example. olivier.girard 4752d 18h /openmsp430/trunk/core/
112 Modified comment. olivier.girard 4760d 17h /openmsp430/trunk/core/

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