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[/] [openmsp430/] [trunk/] [core/] - Rev 85

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Rev Log message Author Age Path
85 Diverse RTL cosmetic updates. olivier.girard 4882d 18h /openmsp430/trunk/core/
84 Update SRAM model in the core testbench to prevent the IEEE warning when running simulations.
Update watchdog to fix NMI synchronisation problem.
Add synchronizers for the PUC signal in the debug interface.		 olivier.girard 4887d 19h /openmsp430/trunk/core/
80 Create initial version of the Actel FPGA implementation example. olivier.girard 4937d 02h /openmsp430/trunk/core/
79 Update the GPIO peripheral to fix a potential synchronization issue. olivier.girard 4948d 20h /openmsp430/trunk/core/
76 Add possibility to simulate C code within the "core" environment. olivier.girard 4953d 18h /openmsp430/trunk/core/
74 Update serial debug interface to support memories with a size which is not a power of 2.
Update the software tools accordingly.		 olivier.girard 5035d 19h /openmsp430/trunk/core/
73 Update all bash scripts headers with "#!/bin/bash" instead of "#!/bin/sh".
This will prevent compatibility problems in systems where bash isn't the default shell.		 olivier.girard 5060d 20h /openmsp430/trunk/core/
72 Expand configurability options of the program and data memory sizes. olivier.girard 5062d 20h /openmsp430/trunk/core/
68 Update synthesis scripts with the hardware multiplier support. olivier.girard 5210d 03h /openmsp430/trunk/core/
67 Added 16x16 Hardware Multiplier. olivier.girard 5210d 03h /openmsp430/trunk/core/
66 The peripheral templates are now under BSD license.
Developers of new peripherals based on these templates won't have to disclose their code.		 olivier.girard 5210d 07h /openmsp430/trunk/core/
65 Add possibility to disable waveform dumping by setting the OMSP_NODUMP environment variable to 1. olivier.girard 5220d 17h /openmsp430/trunk/core/
64 Add Actel synthesis environment for size and speed analysis. olivier.girard 5231d 03h /openmsp430/trunk/core/
63 Add Altera synthesis environment for size and speed analysis. olivier.girard 5231d 03h /openmsp430/trunk/core/
62 Add Xilinx synthesis environment for size&speed analysis. olivier.girard 5231d 05h /openmsp430/trunk/core/
60 Cleanup of the PC (R0) generation logic.
Formal equivalence was shown between the new and old code with Synopsys' Formality (to make sure that nothing has been broken :-P ).		 olivier.girard 5241d 18h /openmsp430/trunk/core/
58 Update the debug hardware breakpoint verification patterns to reflect the latest design updates. olivier.girard 5243d 16h /openmsp430/trunk/core/
57 Update design to exclude the range mode from the debug hardware breakpoint units. As this feature is not used by GDB, it has been disabled in order to improve the timings and save a bit of area/utilisation.
Note that if required, this feature can be re-enabled through the `HWBRK_RANGE define located in the "openMSP430_defines.v" file.		 olivier.girard 5243d 16h /openmsp430/trunk/core/
56 Update Design Compiler Synthesis scripts. olivier.girard 5247d 23h /openmsp430/trunk/core/
55 Add a "sandbox" test pattern to play around with the simulation :-P olivier.girard 5248d 18h /openmsp430/trunk/core/

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