OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] - Rev 103

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
100 Update HTML documentation with Actel's FPGA implementation example (file & directory description section). olivier.girard 4925d 10h /openmsp430/trunk/fpga/
98 Added support for VCS verilog simulator.
VPD and TRN waveforms can now be generated.
olivier.girard 4926d 11h /openmsp430/trunk/fpga/
96 Fixed EraseROM command in the TCL library of the Software development tools. olivier.girard 4927d 11h /openmsp430/trunk/fpga/
94 Thanks to Mihai-Costin Manolescu's contribution, the simulation scripts now support the following simulators:
- Icarus Verilog
- Cver
- Verilog-XL
- NCVerilog
- Modelsim
olivier.girard 4930d 11h /openmsp430/trunk/fpga/
91 Fixed bug when an IRQ arrives while CPU is halted through the serial debug interface.
This bug is CRITICAL for people using working with interrupts and the Serial Debug Interface.
olivier.girard 4934d 12h /openmsp430/trunk/fpga/
86 Update serial debug interface test patterns to make them work with all program memory configurations. olivier.girard 4957d 08h /openmsp430/trunk/fpga/
85 Diverse RTL cosmetic updates. olivier.girard 4957d 10h /openmsp430/trunk/fpga/
84 Update SRAM model in the core testbench to prevent the IEEE warning when running simulations.
Update watchdog to fix NMI synchronisation problem.
Add synchronizers for the PUC signal in the debug interface.
olivier.girard 4962d 11h /openmsp430/trunk/fpga/
83 Add Oscilloscope screenshot + link to the original game. olivier.girard 5008d 11h /openmsp430/trunk/fpga/
82 Update Actel example project:
- synthesis scripts.
- Spacewar demo program.
- SVN ignore patterns for diverse directories
olivier.girard 5008d 11h /openmsp430/trunk/fpga/
81 Initial synthesis, P&R setup for the Actel example project. olivier.girard 5011d 10h /openmsp430/trunk/fpga/
80 Create initial version of the Actel FPGA implementation example. olivier.girard 5011d 18h /openmsp430/trunk/fpga/
79 Update the GPIO peripheral to fix a potential synchronization issue. olivier.girard 5023d 12h /openmsp430/trunk/fpga/
74 Update serial debug interface to support memories with a size which is not a power of 2.
Update the software tools accordingly.
olivier.girard 5110d 11h /openmsp430/trunk/fpga/
73 Update all bash scripts headers with "#!/bin/bash" instead of "#!/bin/sh".
This will prevent compatibility problems in systems where bash isn't the default shell.
olivier.girard 5135d 12h /openmsp430/trunk/fpga/
72 Expand configurability options of the program and data memory sizes. olivier.girard 5137d 12h /openmsp430/trunk/fpga/
71 Update the FPGA example projects with the newer openMSP430 core including the hardware multiplier. olivier.girard 5284d 11h /openmsp430/trunk/fpga/
61 Update openMSP430 rtl. olivier.girard 5316d 09h /openmsp430/trunk/fpga/
59 Update the FPGA projects with the latest core design updates. olivier.girard 5318d 08h /openmsp430/trunk/fpga/
54 Update FPGA projects with the combinatorial loop fixed. olivier.girard 5323d 13h /openmsp430/trunk/fpga/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.