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[/] [openmsp430/] [trunk/] [fpga/] - Rev 81

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Rev Log message Author Age Path
81 Initial synthesis, P&R setup for the Actel example project. olivier.girard 5012d 21h /openmsp430/trunk/fpga/
80 Create initial version of the Actel FPGA implementation example. olivier.girard 5013d 06h /openmsp430/trunk/fpga/
79 Update the GPIO peripheral to fix a potential synchronization issue. olivier.girard 5025d 00h /openmsp430/trunk/fpga/
74 Update serial debug interface to support memories with a size which is not a power of 2.
Update the software tools accordingly.		 olivier.girard 5111d 23h /openmsp430/trunk/fpga/
73 Update all bash scripts headers with "#!/bin/bash" instead of "#!/bin/sh".
This will prevent compatibility problems in systems where bash isn't the default shell.		 olivier.girard 5137d 00h /openmsp430/trunk/fpga/
72 Expand configurability options of the program and data memory sizes. olivier.girard 5139d 00h /openmsp430/trunk/fpga/
71 Update the FPGA example projects with the newer openMSP430 core including the hardware multiplier. olivier.girard 5285d 23h /openmsp430/trunk/fpga/
61 Update openMSP430 rtl. olivier.girard 5317d 21h /openmsp430/trunk/fpga/
59 Update the FPGA projects with the latest core design updates. olivier.girard 5319d 20h /openmsp430/trunk/fpga/
54 Update FPGA projects with the combinatorial loop fixed. olivier.girard 5325d 01h /openmsp430/trunk/fpga/
43 Re-add documentation (earlier pdf was broken). olivier.girard 5353d 21h /openmsp430/trunk/fpga/
42 olivier.girard 5353d 21h /openmsp430/trunk/fpga/
41 Update bitstream & SVN ignore patterns. olivier.girard 5353d 21h /openmsp430/trunk/fpga/
40 Minor updates. olivier.girard 5353d 21h /openmsp430/trunk/fpga/
39 Update FPGA projects with new openMSP430 core. olivier.girard 5353d 22h /openmsp430/trunk/fpga/
38 Remove old core version. olivier.girard 5353d 22h /openmsp430/trunk/fpga/
37 olivier.girard 5353d 22h /openmsp430/trunk/fpga/
36 Remove old core version. olivier.girard 5353d 23h /openmsp430/trunk/fpga/
32 Minor update to the HTML documentation + add some SVN ignore properties to the Altera FPGA project simulation directory. olivier.girard 5355d 21h /openmsp430/trunk/fpga/
30 Add Altera Cyclone II FPGA project example (thanks to Vadim Akimov contribution). olivier.girard 5355d 22h /openmsp430/trunk/fpga/

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