URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [bench/] - Rev 107

Rev	Log message	Author	Age	Path
107	Update Actel and Alter FPGA examples with the latest openMSP430 core RTL version.	olivier.girard	4940d 03h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/bench/
104	Update all FPGA example projects with the latest RTL version.	olivier.girard	4959d 05h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/bench/
98	Added support for VCS verilog simulator. VPD and TRN waveforms can now be generated.	olivier.girard	4965d 05h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/bench/
94	Thanks to Mihai-Costin Manolescu's contribution, the simulation scripts now support the following simulators: - Icarus Verilog - Cver - Verilog-XL - NCVerilog - Modelsim	olivier.girard	4969d 05h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/bench/
80	Create initial version of the Actel FPGA implementation example.	olivier.girard	5050d 12h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/bench/