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[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [rtl/] [verilog/] [openmsp430/] [periph/] - Rev 107

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Rev Log message Author Age Path
107 Update Actel and Alter FPGA examples with the latest openMSP430 core RTL version. olivier.girard 4973d 02h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/rtl/verilog/openmsp430/periph/
104 Update all FPGA example projects with the latest RTL version. olivier.girard 4992d 05h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/rtl/verilog/openmsp430/periph/
85 Diverse RTL cosmetic updates. olivier.girard 5029d 04h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/rtl/verilog/openmsp430/periph/
80 Create initial version of the Actel FPGA implementation example. olivier.girard 5083d 12h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/rtl/verilog/openmsp430/periph/

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