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[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [sim/] [rtl_sim/] [src/] - Rev 107

Rev	Log message	Author	Age	Path
107	Update Actel and Alter FPGA examples with the latest openMSP430 core RTL version.	olivier.girard	4831d 19h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/sim/rtl_sim/src/
105	Removed dummy memory read access for the MOV/PUSH/CALL/RETI instructions. These were not problematic but this is simply cleaner that way.	olivier.girard	4846d 21h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/sim/rtl_sim/src/
80	Create initial version of the Actel FPGA implementation example.	olivier.girard	4942d 05h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/sim/rtl_sim/src/