OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [rtl/] [verilog/] [coregen/] - Rev 202

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
200 Major verificaiton and benchmark update to support both MSPGCC and RedHat/TI GCC toolchains. olivier.girard 3463d 16h /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/rtl/verilog/coregen/
167 Update LX9 Microboard FPGA example.
It now includes a dual-core oMSP system with a shared 16kB program memory.
Each core has its own 2kB data memory and an additional 2kB shared data memory.
olivier.girard 4239d 17h /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/rtl/verilog/coregen/
157 Re-create new LX9 Microboard project to show off the new I2C serial debug interface (and more to come).... olivier.girard 4291d 16h /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/rtl/verilog/coregen/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.