URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [rtl/] [verilog/] [coregen/] - Rev 202

Rev	Log message	Author	Age	Path
200	Major verificaiton and benchmark update to support both MSPGCC and RedHat/TI GCC toolchains.	olivier.girard	3437d 20h	/openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/rtl/verilog/coregen/
167	Update LX9 Microboard FPGA example. It now includes a dual-core oMSP system with a shared 16kB program memory. Each core has its own 2kB data memory and an additional 2kB shared data memory.	olivier.girard	4213d 21h	/openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/rtl/verilog/coregen/
157	Re-create new LX9 Microboard project to show off the new I2C serial debug interface (and more to come)....	olivier.girard	4265d 20h	/openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/rtl/verilog/coregen/