URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [synthesis/] [xilinx/] [bitstreams/] - Rev 212

Rev	Log message	Author	Age	Path
212	Update all FPGA project examples to support both MSPGCC and TI/RedHat GCC toolchains.	olivier.girard	3285d 20h	/openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/synthesis/xilinx/bitstreams/
193	Update FPGA projects with latest core RTL changes.	olivier.girard	3985d 10h	/openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/synthesis/xilinx/bitstreams/
176	Update FPGA projects with latest openMSP430 core RTL	olivier.girard	4306d 09h	/openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/synthesis/xilinx/bitstreams/
171	Update in order to add Hardware breakpoint support. Hardware breakpoint are here only added for development purpose in order to add multi-core features as well as software & hardware breakpoint support to the GDB-Proxy.	olivier.girard	4340d 08h	/openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/synthesis/xilinx/bitstreams/
167	Update LX9 Microboard FPGA example. It now includes a dual-core oMSP system with a shared 16kB program memory. Each core has its own 2kB data memory and an additional 2kB shared data memory.	olivier.girard	4361d 10h	/openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/synthesis/xilinx/bitstreams/
165	Add missing I2C address in the README file.	olivier.girard	4375d 10h	/openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/synthesis/xilinx/bitstreams/
157	Re-create new LX9 Microboard project to show off the new I2C serial debug interface (and more to come)....	olivier.girard	4413d 09h	/openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/synthesis/xilinx/bitstreams/