OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] - Rev 120

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
120 Documents exception generation by l.jalr and l.jr jeremybennett 5103d 23h /openrisc/
119 Updated to clarify exceptions for division and details of multiplication. jeremybennett 5104d 11h /openrisc/
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5104d 20h /openrisc/
117 Updates on l.ff1, l.fl1 and l.maci. jeremybennett 5106d 23h /openrisc/
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5106d 23h /openrisc/
115 Added support for l.fl1 and tests for l.ff1 and l.fl1 jeremybennett 5107d 23h /openrisc/
114 l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. All set overflow correctly, triggering a range exception if the OVE bit is set in the SR. jeremybennett 5108d 00h /openrisc/
113 Updates to exception handling for l.add and l.div jeremybennett 5108d 22h /openrisc/
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5108d 23h /openrisc/
111 Changed conditionals for Verilator to "verilator" instead of "VERILATOR". jeremybennett 5109d 03h /openrisc/
110 or1ksim make check should work without a libc in the or32-elf tools julius 5110d 00h /openrisc/
109 or_debug_proxy does signals with signals, just ignores signals julius 5110d 08h /openrisc/
108 Updated to clarify overflow and exceptions for l.add, l.addc, l.addi, l.addic, l.div and l.divu. jeremybennett 5111d 22h /openrisc/
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5111d 23h /openrisc/
106 Removing old tests, pending addition of new ones. jeremybennett 5111d 23h /openrisc/
105 Tagging the 0.4.0rc1 candidate release of Or1ksim jeremybennett 5115d 07h /openrisc/
104 Candidate release 0.4.0rc4 jeremybennett 5115d 07h /openrisc/
103 Updated to clarify lf.madd.d and lf.madd.s opcodes. jeremybennett 5116d 03h /openrisc/
102 added linux-2.6.34 and uClibc-0.9.31 patch file marcus.erlandsson 5122d 10h /openrisc/
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5124d 00h /openrisc/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.