OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] - Rev 131

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
131 This brings the OpenRISC repository for GDB 6.8 into line with the patched
tool which is distributed. Missing Makefile.in and configure files are added.		 jeremybennett 5251d 21h /openrisc/
130 Updating uclibc patch julius 5253d 00h /openrisc/
129 Previous commit was before saving file. jeremybennett 5253d 20h /openrisc/
128 Tagging the 0.4.0rc2 candidate release of Or1ksim jeremybennett 5253d 20h /openrisc/
127 New config option to allow l.xori with unsigned operand. jeremybennett 5253d 21h /openrisc/
126 More explanation of l.xori. jeremybennett 5253d 21h /openrisc/
125 Update to specification of l.xori. jeremybennett 5254d 04h /openrisc/
124 Overflow handling now in line with architecture manual. Tests added. jeremybennett 5254d 17h /openrisc/
123 Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. jeremybennett 5254d 21h /openrisc/
122 Added l.ror and l.rori with associated tests. jeremybennett 5255d 17h /openrisc/
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5255d 17h /openrisc/
120 Documents exception generation by l.jalr and l.jr jeremybennett 5255d 17h /openrisc/
119 Updated to clarify exceptions for division and details of multiplication. jeremybennett 5256d 05h /openrisc/
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5256d 14h /openrisc/
117 Updates on l.ff1, l.fl1 and l.maci. jeremybennett 5258d 17h /openrisc/
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5258d 17h /openrisc/
115 Added support for l.fl1 and tests for l.ff1 and l.fl1 jeremybennett 5259d 17h /openrisc/
114 l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. All set overflow correctly, triggering a range exception if the OVE bit is set in the SR. jeremybennett 5259d 18h /openrisc/
113 Updates to exception handling for l.add and l.div jeremybennett 5260d 17h /openrisc/
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5260d 17h /openrisc/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.