Rev |
Log message |
Author |
Age |
Path |
412 |
ORPSoC update - Rearranged Xilinx ML501, simulations working again. |
julius |
4949d 01h |
/openrisc/ |
411 |
Improved ethmac testbench and software.
Renamed some OR1200 library functions to be more generic.
Fixed bug with versatile_mem_ctrl for Actel board.
Added ability to simulate gatelevel modules alongside RTL modules
in board build. |
julius |
4949d 13h |
/openrisc/ |
410 |
ORPSoC: Adding README in root explaining how to build documentation, and
documentation fixup so it builds properly again. |
julius |
4950d 12h |
/openrisc/ |
409 |
ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation. |
julius |
4950d 12h |
/openrisc/ |
408 |
ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. |
julius |
4951d 01h |
/openrisc/ |
407 |
Update or1ksim version in toolchain script to rc2 |
julius |
4951d 03h |
/openrisc/ |
406 |
ORPmon indented files, bus, align and instruction errors vectors printf and reboot |
julius |
4951d 04h |
/openrisc/ |
405 |
ORPmon updates - ethernet driver updates |
julius |
4951d 08h |
/openrisc/ |
404 |
New scripts to build separate bare metal and Linux tool chains. Fixes to GDB so it builds with the Linux tool chain and uses RELA. Other minor fixes to the GCC tool chain. |
jeremybennett |
4951d 09h |
/openrisc/ |
403 |
ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. |
julius |
4952d 06h |
/openrisc/ |
402 |
Further updates to the compiler |
jeremybennett |
4952d 11h |
/openrisc/ |
401 |
Fixing find first one (ff1) and find last one (fl1) support in OR1200.
Updated documentation, adding missing l.ff1 and l.fl1 opcodes to supported
instructions table. |
julius |
4952d 11h |
/openrisc/ |
400 |
Updates to the linker, GCC, newlib and GDB in preparation for supporting C++. The key changes are that the linker now uses RELA and that GCC may save registers at the bottom of the stack before the frame is allocated or after it is deallocated, so exception handlers/thread primitives should not use the first 130 bytes after the SP. |
jeremybennett |
4952d 11h |
/openrisc/ |
399 |
Updates to the linker, GCC, newlib and GDB in preparation for supporting C++. The key changes are that the linker now uses RELA and that GCC may save registers at the bottom of the stack before the frame is allocated or after it is deallocated, so exception handlers/thread primitives should not use the first 130 bytes after the SP. |
jeremybennett |
4952d 14h |
/openrisc/ |
398 |
ORPSoCv2 removing generic backend path - not needed |
julius |
4953d 13h |
/openrisc/ |
397 |
ORPSoCv2:
doc/ path added, with Texinfo documentation. Still a work in progress.
VPI files updated.
OR1200 l.maci instruction test added. highlighting bug with immediate field for that instruction.
Various cycle accurate model updates. Now uses orpsoc-defines.v (processed C-compat. version) to build. |
julius |
4954d 12h |
/openrisc/ |
396 |
ORPSoCv2 final software fixes...for now. See updated README |
julius |
4957d 11h |
/openrisc/ |
395 |
ORPSoCv2 moving ethernet tests to correct place |
julius |
4957d 11h |
/openrisc/ |
394 |
ORPSoCv2 removing unused directories |
julius |
4957d 11h |
/openrisc/ |
393 |
ORPSoCv2 software rearrangement in progress. Basic tests should now run again. |
julius |
4957d 11h |
/openrisc/ |