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439 ORPSoC update

Ethernet MAC synthesis issues with Actel Synplify D-2009.12A
Ethernet MAC FIFO synthesis issues with Xilinx XST

Multiply/divide tests for to run on target.

Added third interface to ram_wb module, changed reference design RAM to ram_wb
wrapper. Updated verilog and system C monitor modules accordingly.

Added ability to use ram_wb as internal memory on ML501 design.

Fixed ethernet MAC tests for ML501.		 julius 4917d 10h /openrisc/
438 Fix to newlib header and library locations. jeremybennett 4920d 11h /openrisc/
437 Or1ksim - ethernet peripheral update, working much better. julius 4923d 01h /openrisc/
436 Or1ksim ethernet TAP updates. Ethernet test still failing. julius 4924d 01h /openrisc/
435 ORPSoC updates
OR1200 multiply/MAC/division unit update with serial multiply and
divide options. Full divide not synthesizable yet.
New software tests of multiply and divide functionality.		 julius 4924d 02h /openrisc/
434 Work in progress with new Ethernet TUN/TAP interface. jeremybennett 4927d 07h /openrisc/
433 New single program interrupt test programs. jeremybennett 4928d 09h /openrisc/
432 Updates to handle interrupts correctly. jeremybennett 4928d 10h /openrisc/
431 Updated and move OR1200 supplementary manual.

or_debug_proxy GDB RSP interface fix.

ORPSoC S/W and makefile updates.		 julius 4930d 09h /openrisc/
430 or1ksim - clarifying interrupt behavior in code and documentation. julius 4931d 07h /openrisc/
429 or1ksim update - remove debug printfs from eth MDIO emulation function
and fix illegal instruction vector jump for invalid instructions.		 julius 4931d 10h /openrisc/
428 or1ksim - adding preliminary PHY emulation to ethernet peripheral. julius 4934d 06h /openrisc/
427 Fixes for C++ to correspond to fixes in uClibc. jeremybennett 4935d 15h /openrisc/
426 ORPSoC update

Reverted back to previous OR1200 instruction cache.
(...which...)
Fixed or1200-except test failure on generic model.

ML501 build not passing or1200-except test. Tried disabling
burst on the bus (memory server doesn't support it yet) to
no avail. To be continued...		 julius 4937d 01h /openrisc/
425 ORPSoC update:

GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.

Documentation updated.

Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.

Updated Or1200 tests to report test success value and then
exit with value 0.		 julius 4937d 02h /openrisc/
424 C++ library, needed for C++ compiler. jeremybennett 4937d 12h /openrisc/
423 Minor typo fixed. jeremybennett 4937d 15h /openrisc/
422 Separates out --force actions, so only build dirs corresponding to targets being built are blown away. jeremybennett 4937d 15h /openrisc/
421 Fixing some typos in bld-all.sh's --help printout and changed all
"cd .." lines to "cd -".		 julius 4940d 13h /openrisc/
420 New feature to trace instructions (option --trace). Manual updated to match. jeremybennett 4942d 11h /openrisc/

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