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Rev Log message Author Age Path
445 gdbserver update to use kernel port ptrace register definitions. julius 5006d 08h /openrisc/
444 Changes to ABI handling of varargs. jeremybennett 5006d 17h /openrisc/
443 Work in progress on more efficient Ethernet. jeremybennett 5006d 20h /openrisc/
442 OR1Ksim - adding trace controlability by SIGUSR1 signal. julius 5007d 11h /openrisc/
441 Changes for gdbserver. jeremybennett 5007d 17h /openrisc/
440 Updated documentation to describe new Ethernet usage. jeremybennett 5008d 12h /openrisc/
439 ORPSoC update

Ethernet MAC synthesis issues with Actel Synplify D-2009.12A
Ethernet MAC FIFO synthesis issues with Xilinx XST

Multiply/divide tests for to run on target.

Added third interface to ram_wb module, changed reference design RAM to ram_wb
wrapper. Updated verilog and system C monitor modules accordingly.

Added ability to use ram_wb as internal memory on ML501 design.

Fixed ethernet MAC tests for ML501.		 julius 5010d 16h /openrisc/
438 Fix to newlib header and library locations. jeremybennett 5013d 17h /openrisc/
437 Or1ksim - ethernet peripheral update, working much better. julius 5016d 07h /openrisc/
436 Or1ksim ethernet TAP updates. Ethernet test still failing. julius 5017d 07h /openrisc/
435 ORPSoC updates
OR1200 multiply/MAC/division unit update with serial multiply and
divide options. Full divide not synthesizable yet.
New software tests of multiply and divide functionality.		 julius 5017d 08h /openrisc/
434 Work in progress with new Ethernet TUN/TAP interface. jeremybennett 5020d 13h /openrisc/
433 New single program interrupt test programs. jeremybennett 5021d 15h /openrisc/
432 Updates to handle interrupts correctly. jeremybennett 5021d 16h /openrisc/
431 Updated and move OR1200 supplementary manual.

or_debug_proxy GDB RSP interface fix.

ORPSoC S/W and makefile updates.		 julius 5023d 15h /openrisc/
430 or1ksim - clarifying interrupt behavior in code and documentation. julius 5024d 13h /openrisc/
429 or1ksim update - remove debug printfs from eth MDIO emulation function
and fix illegal instruction vector jump for invalid instructions.		 julius 5024d 16h /openrisc/
428 or1ksim - adding preliminary PHY emulation to ethernet peripheral. julius 5027d 12h /openrisc/
427 Fixes for C++ to correspond to fixes in uClibc. jeremybennett 5028d 21h /openrisc/
426 ORPSoC update

Reverted back to previous OR1200 instruction cache.
(...which...)
Fixed or1200-except test failure on generic model.

ML501 build not passing or1200-except test. Tried disabling
burst on the bus (memory server doesn't support it yet) to
no avail. To be continued...		 julius 5030d 07h /openrisc/

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