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Rev Log message Author Age Path
497 or_debug_proxy updates julius 4869d 06h /openrisc/
496 ORPSoC ml501 updates - increased frequency, updated documentation julius 4869d 07h /openrisc/
495 ORPSoC adding more accessor functions to Micron SDRAM model. julius 4869d 08h /openrisc/
494 Change to ensure handles ctrl-C correctly with empty line. jeremybennett 4880d 01h /openrisc/
493 ORPSoC VPI JTAG interface, hopefully fix 64-bit machine compile issues. julius 4882d 09h /openrisc/
492 ORPSoC VPI interface for modelsim and documentation update julius 4883d 08h /openrisc/
491 ORPSoC or1200_monitor update. julius 4883d 18h /openrisc/
490 Updates to fix spurious test failures and register scheduling. jeremybennett 4888d 00h /openrisc/
489 ORPSoC sw cleanup. Remove warnings. julius 4893d 07h /openrisc/
488 ORPSoC OR1200 driver - tick timer exception handler reverted to generic - cpu tick function hook used as default in handler table. OR1200 timer demo sw for board added. julius 4893d 07h /openrisc/
487 ORPSoC main software makefile update julius 4896d 05h /openrisc/
486 ORPSoC updates, mainly software, i2c driver julius 4896d 05h /openrisc/
485 ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 julius 4900d 10h /openrisc/
484 Changes to make r12 call-saved and to bring wchar tests in line. jeremybennett 4901d 08h /openrisc/
483 Updated with new opcodes to generate random numbers and to identify us as Or1ksim. jeremybennett 4903d 10h /openrisc/
482 Don't hardcode tool versions in help text olof 4904d 22h /openrisc/
481 OR1200 Update. RTL and spec. julius 4916d 16h /openrisc/
480 ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes. julius 4917d 14h /openrisc/
479 ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. julius 4918d 14h /openrisc/
478 ORPSoC update - ml501 or1200 cache configuration set to maximum, some cleanups. julius 4920d 05h /openrisc/

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