| Rev |
Log message |
Author |
Age |
Path |
| 790 |
fixed issues with context switching, interrupts, optimizations and cleanups |
skrzyp |
4499d 06h |
/openrisc/ |
| 789 |
ORPSoC: Patch from R Diez to make RTL sim report l.nops have equivalent formatting to those from or1ksim
Signed-off-by: R Diez <rdiezmail-openrisc@yahoo.de>
Acked-by: Julius Baxter <juliusbaxter@gmail.com> |
julius |
4503d 02h |
/openrisc/ |
| 788 |
or1200: Patch from R Diez to remove l.cust5 signal from a sensitivty list when it's not defined.
Signed-off-by: R Diez <rdiezmail-openrisc@yahoo.de>
Acked-by: Julius Baxter <juliusbaxter@gmail.com> |
julius |
4503d 02h |
/openrisc/ |
| 787 |
Patch from R Diez to zero R0 on startup. ChangeLog from testsuite/test-code-or1k:
2012-03-23 Jeremy Bennett <jeremy.bennett@embecosm.com>
Patch from R Diez <rdiezmail-openrisc@yahoo.de>
* cache/cache-asm.S, cfg/cfg.S, except-test/except-test-s.S,
* except/except.S, ext/ext.S, flag/flag.S, fp/fp.S,
* inst-set-test/inst-set-test.S, int-test/int-test.S,
* mc-common/except-mc.S, uos/except-or32.S: Clear R0 on
start-up. There is no guarantee that R0 is hardwired to zero, and
indeed it is not when simulating the or1200 Verilog core.
* configure: Regenerated.
* configure.ac: Updated version. |
jeremybennett |
4504d 10h |
/openrisc/ |
| 786 |
new ecos tree (tracking mainline) |
skrzyp |
4504d 10h |
/openrisc/ |
| 785 |
We are about to upload a new tree (that has a different structure) |
skrzyp |
4504d 11h |
/openrisc/ |
| 784 |
Patch from R Diez to ensure DejaGnu handles errors better. Autoconf infrastructure all updated.
2012-03-21 Jeremy Bennett <jeremy.bennett@embecosm.com>
Patch from R Diez <rdiezmail-openrisc@yahoo.de>
* Makefile.am: Add AM_RUNTESTFLAGS to trigger correct error
behaviour. |
jeremybennett |
4506d 01h |
/openrisc/ |
| 783 |
Initial dev directory snapshot with FSF GCC mainline |
jeremybennett |
4520d 00h |
/openrisc/ |
| 782 |
Tags directory for GNU development tool chain. |
jeremybennett |
4520d 00h |
/openrisc/ |
| 781 |
Initial check-in of GCC, with properties matching the upstream. |
jeremybennett |
4522d 11h |
/openrisc/ |
| 780 |
Initial check-in of GCC, with properties matching the upstream. |
jeremybennett |
4525d 01h |
/openrisc/ |
| 779 |
Initial check-in of GCC, with properties matching the upstream. |
jeremybennett |
4525d 01h |
/openrisc/ |
| 778 |
Initial check-in of GCC, with properties matching the upstream. |
jeremybennett |
4525d 01h |
/openrisc/ |
| 777 |
Initial check-in of GCC, with properties matching the upstream. |
jeremybennett |
4525d 01h |
/openrisc/ |
| 776 |
Initial check-in of GCC, with properties matching the upstream. |
jeremybennett |
4525d 01h |
/openrisc/ |
| 775 |
Initial check-in of GCC, with properties matching the upstream. |
jeremybennett |
4525d 01h |
/openrisc/ |
| 774 |
Initial check-in of GCC, with properties matching the upstream. |
jeremybennett |
4525d 01h |
/openrisc/ |
| 773 |
Initial check-in of GCC, with properties matching the upstream. |
jeremybennett |
4525d 01h |
/openrisc/ |
| 772 |
Initial check-in of GCC, with properties matching the upstream. |
jeremybennett |
4525d 02h |
/openrisc/ |
| 771 |
Initial check-in of GCC, with properties matching the upstream. |
jeremybennett |
4525d 02h |
/openrisc/ |
