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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] - Rev 205

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Rev Log message Author Age Path
205 Adding OR1K port of binutils-2.20.1, bld.sh updated to use it, zlib not handled nicely when compiling gdb's sim or gdb because linking libbfd relies on zlib and couldnt figure out how to do it properly so hard-attached some -lz to some library flags in places in gdb julius 5112d 10h /openrisc/
204 Clean up of make and configure files. Added OR32 to libnosys config. jeremybennett 5114d 00h /openrisc/
203 Fixed LIB_SPEC and STARTFILE_SPEC for newlib jeremybennett 5114d 00h /openrisc/
202 Adding executed log in binary format capability to or1ksim julius 5114d 02h /openrisc/
201 Fixed ordering of the newlib include directory (should be after system includes, not before). jeremybennett 5114d 10h /openrisc/
200 Updated to put newlib in a custom location. jeremybennett 5115d 01h /openrisc/
199 Fixes to SPECs to pick up newlib in custom locations. jeremybennett 5115d 01h /openrisc/
198 A collection of minor tidy ups. jeremybennett 5115d 01h /openrisc/
197 Fixed bug in memory allocator. jeremybennett 5117d 04h /openrisc/
196 Fixed name for newlib install option. jeremybennett 5117d 04h /openrisc/
195 Adding linux and uClibc paths back for patches, updated gnu-src build script making newlib an option (off by deafult) julius 5117d 05h /openrisc/
194 Tidied up code setjmp and longjmp into their own files, and adjusted Makefile accordingly. Simplified cache setup in startup code. Replaced calls via register with calls using immediate address. jeremybennett 5117d 22h /openrisc/
193 Record changes to initfini.c jeremybennett 5117d 22h /openrisc/
192 Updated to fix problems with initfini assembler fragments. jeremybennett 5117d 22h /openrisc/
191 Updated to clarify use of r9 in the l.jalr delay slot. jeremybennett 5117d 23h /openrisc/
190 Allow the Or1ksim installation directory to be set by option. jeremybennett 5118d 04h /openrisc/
189 Fuller explanation of the build script given. jeremybennett 5118d 04h /openrisc/
188 More rigorous testing of options. jeremybennett 5118d 05h /openrisc/
187 Or1200 sprs FPU update julius 5119d 22h /openrisc/
186 OR1200 RTL FPU fix - RF writeback signal working properly again julius 5120d 01h /openrisc/

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