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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

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Rev Log message Author Age Path
424 C++ library, needed for C++ compiler. jeremybennett 5021d 21h /openrisc/
423 Minor typo fixed. jeremybennett 5022d 00h /openrisc/
422 Separates out --force actions, so only build dirs corresponding to targets being built are blown away. jeremybennett 5022d 00h /openrisc/
421 Fixing some typos in bld-all.sh's --help printout and changed all
"cd .." lines to "cd -".		 julius 5024d 22h /openrisc/
420 New feature to trace instructions (option --trace). Manual updated to match. jeremybennett 5026d 20h /openrisc/
419 ORPmon: Fixed interrupt routines in reset.S so they are compatible with new
GCC port (skip over redzone).
Added some defines to easily switch what is done when an error vector
is executed.
Added ability to print out EPCR when crashing.
Changed linker script back to one which doesn't skip over holes in SPI
flash memories.		 julius 5026d 23h /openrisc/
418 Or1ksim - adding new option when configuring memories, "exitnops" julius 5026d 23h /openrisc/
417 ORPSoC re-adding doc automake files, this time not symlinks julius 5029d 20h /openrisc/
416 ORPSoC doc cleanup - removing symlinks from automake'd docs build path julius 5029d 20h /openrisc/
415 ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash.		 julius 5029d 20h /openrisc/
414 Updates to add -mredzone and improved GCC optimizations. jeremybennett 5030d 15h /openrisc/
413 Fixed to combined bug in the assembler and linker. jeremybennett 5031d 18h /openrisc/
412 ORPSoC update - Rearranged Xilinx ML501, simulations working again. julius 5033d 10h /openrisc/
411 Improved ethmac testbench and software.

Renamed some OR1200 library functions to be more generic.

Fixed bug with versatile_mem_ctrl for Actel board.

Added ability to simulate gatelevel modules alongside RTL modules
in board build.		 julius 5033d 22h /openrisc/
410 ORPSoC: Adding README in root explaining how to build documentation, and
documentation fixup so it builds properly again.		 julius 5034d 21h /openrisc/
409 ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation.		 julius 5034d 21h /openrisc/
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 5035d 10h /openrisc/
407 Update or1ksim version in toolchain script to rc2 julius 5035d 12h /openrisc/
406 ORPmon indented files, bus, align and instruction errors vectors printf and reboot julius 5035d 13h /openrisc/
405 ORPmon updates - ethernet driver updates julius 5035d 17h /openrisc/

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